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FSL Problem:Data Return and Use

Hi!

I wrote a custom IP peripheral in verilog and interfaced it to MicroBlaze, using Harware>Co-processor option. I can see the peripheral connected on the System Design Diagram.All compile and build is successful.

Now I can see on hyperterminal that data is being sent to FSL. But then it gets stuck, there is no return of data from FSL.

I will paste both my Microblaze C code and Verilog code. kinldy guide me if there is a problem in my program or a any other problem.

This is C code Test_fsl.c

#include "xparameters.h" #include "mb_interface.h" #include "stdio.h" #include "xutil.h" #include "xdmacentral.h" #include "xdmacentral_l.h" #include "xgpio.h" #include "fsl.h" #include "xbasic_types.h"

int main (void) { // Printing a banner on the Hyper Terminal. print("\t#########################################\n\r"); print("\t# #\n\r"); print("\t# FSL Channel Reference Design #\n\r"); print("\t# MicroBlaze Development Board #\n\r"); print("\t# #\n\r"); print("\t#########################################\n\r"); print("\n\r\n\r");

print("-- Entering main() --\r\n"); int i; Xuint32 arr[64]; for(i=0;i

Reply to
aibk01
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Did it work when you simulated it?

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Reply to
RCIngham

Well i did not simulate it did not know how to. But on the hyper terminal i could see the sent number being printed after the putfsl command. But there was no return of data. ad the numbers where not getting printed as commanded after getfsl command. So it was assumed there was some problem.

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Reply to
aibk01

i

there

Clearly there is a problem. It might be: (a) FPGA firmware. (b) FPGA software. (c) FPGA implementation (P&R or similar). (d) PC. (e) other...

Your problem report does not eliminat any of these areas. If it works in simulation, then (a) and (b) are eliminated.

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Reply to
RCIngham

The build is successful. I can download the Bit file and run it. I can see the data being sent via FSL bus on the hyperterminal by printing the sent values.

Now after the values are sent there is no return of data. What shud i do now?

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Reply to
aibk01

Simulate.

- Brian

Reply to
Brian Drummond

That can be easier said than done when there's EDK involved - it usually means bringing up a simulation of the whole system, booting the simulated processor(s), running the test software and grovelling through an awful lot of waveforms you don't fully understand.

I've had better luck using chipscope to debug these kinds of things on hardware (and this from a guy who's first answer is usually "Simulate" :)

Cheers, Martin

--
martin.j.thompson@trw.com 
TRW Conekt - Consultancy in Engineering, Knowledge and Technology
http://www.conekt.co.uk/capabilities/39-electronic-hardware
Reply to
Martin Thompson

I have to agree that simulation with an EDK design can be a bit painful, and requires a full ISIM rather than the Lite version (or Modelsim). But with a bit of creativity to generate the smallest test case, it can be useful, especially when chasing bugs in the EDK-generated code.

It's worth having the tool in the arsenal, even if it's rarely used. (I tend to relegate Chipscope to that role, but agree you sometimes do really need it)

- Brian

Reply to
Brian Drummond

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