Error synthesizing two Xilinx MacFir core

Hi all, I'm trying to implement a filter switch. I have two different filters (filter30 and filter5, realized with the MacFir Xilinx Core), I have to use only one of them at time, so I'm trying to use a multiplexer (filter_mux) to multiplex the outputs of the filters.

I'm experimenting a strange problem, the filters are not working correctly they always produce the same outputs, but they shouldn't, It seems to be related to wich filter I generate first, if I launch "regenerate core" on the filter in the order filter30,filter5, then the outputs of the two filters will be equal to the output of filter5, if I invert the "regenerate core" order, then I get the output of filter30 on both filters. That's driving me crazy, I can't use the "Multiple coefficients sets" of MacFir ver5.0 because I'm using ISE6.1 and the core version is 3.0.

When I "Synthesize" the design (implemented as a toplevel schematic) I get this warnings: WARNING:Xst:766 - C:/Xilinx/progetti/ddc/filter.vhf line 66: Generating a Black Box for component . WARNING:Xst:766 - C:/Xilinx/progetti/ddc/filter.vhf line 71: Generating a Black Box for component .

And a lot of this: WARNING:Xst:382 - Register BU2000 is equivalent to BU1318 WARNING:Xst:382 - Register BU2689 is equivalent to BU1318 WARNING:Xst:382 - Register BU3631 is equivalent to BU1318

And I don't know what this means.

Here is a little piece of filter.vhf

-----------------------------filter.vhf---------------------------------

66 XLXI_1 : filter30 67 port map (CLK=>CLK, DIN(13 downto 0)=>DIN(13 downto 0), ND=>ND, 68 RESET=>RESET, DOUT(33 downto 0)=>XLXN_9(33 downto 0), RDY=>XLXN_10, 69 RFD=>XLXN_11); 70 71 XLXI_2 : filter5 72 port map (CLK=>CLK, DIN(13 downto 0)=>DIN(13 downto 0), ND=>ND, 73 RESET=>RESET, DOUT(33 downto 0)=>XLXN_12(33 downto 0), 74 RDY=>XLXN_13, RFD=>XLXN_14); 75 76 XLXI_3 : filter_mux 77 port map (CLK=>CLK_DIV, DOUT_IN_A(33 downto 0)=>XLXN_9(33 downto 0), 78 DOUT_IN_B(33 downto 0)=>XLXN_12(33 downto 0), RDY_A=>XLXN_10, 79 RDY_B=>XLXN_13, RFD_A=>XLXN_11, RFD_B=>XLXN_14, SEL=>SEL_OUT, 80 DOUT(23 downto 0)=>DOUT(23 downto 0), RDY=>RDY, RFD=>RFD);

-----------------------------filter.vhf---------------------------------

Reading filter.vhf (created automatically) seems that everything is ok, but when I launch "View RTL Schematic" I see that the inputs and outputs ports of the filters seems disconnected.

--
If I feel like exercise, I lie down until it passes.
 
 Click to see the full signature
Reply to
Nemesis
Loading thread data ...

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.