They are relatively new:
Their Trion program has few notable peculiarities:
- unified roruting/LUT tiles. One tile can be used for both roles.
- 5 bit BLOCK RAM instaed of traditional 9-bit
They claim that this and process innovation (only 7 metalic layers) etc that ahould bringg 4x lower prices.
But at least from theri initial offering, as much as it can
One more question:
At least on the first glance, I've got the impression that Trion is not as fast as ECP5. Is this about right ? If so, why do you think this is - power optimisation or perhaps consequence of unified routing/LUT/MEM approach ?
What are you looking at regarding the speed? It is hard to find comparable speed data for FPGAs. I expect you would need to P&R a test design to get any meaningful data.
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