EDK 8.1i

"Marco T." schrieb im Newsbeitrag news:dpjcbm$bl7$ snipped-for-privacy@nnrp.ngi.it...

It was supposed to be available around Christmas.

What is defenetly not in 8.1 is DDR2 controller, dont know about multiport memcontroller

Antti

hi group,

we are trying to test DDR2 on a custom Virtex-4 board after implementing the desing with Xilinx MIG the Status LEDs says the DDR2 is OK, short circuit of some data pins to ground did 'inject' errors as to be expected but I am still not sure if the default FPGA test top from MIG is reliable indicator that the DDR2 memory is actually fully working

does anyone have an idea how to test the DDR2 in a better way?

there doesnt seem to be any reference design with DDR2 and EDK 8.1 is also not going to have DDR2 support yet

Antti