Driving towards 2V4000 during Power up


I have a driver (244) with its OE-pins strapped to ground driving towards I/O-pins of a 2V4000 FPGA. I will make sure these are pure inputs once the configuration is loaded. I'm also aware of the fact that the FPGA tristates its IOs prior to configuration. All devices are connected to the same VCC, the 244 is never powered when the FPGA is not, and vice versa. My question is: what happens during Power-up (or Power-down)? Is it possible that the FPGA-IOs are damaged during power transition when the 244 is already (still) firing at full force?

Any thoughts on this are appreciated. Gunter

Reply to
Gunter Knittel
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I don't think you will have a problem. As long the 244 have the correct output voltage levels.

Reply to
Vanheesbeke Stefaan


There will be no damage, as the FPGA IOs are tristated, so they don't care.

Aust> Hi,

Reply to
Austin Lesea

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