I want to simulate a fpga-based SDRAM controller with a SDRAM model.
Say the PCB delay is 1 ns, shall I delay the feedback clock with 1ns or 2ns (because of the round trip trace on the PCB)?
I want to simulate a fpga-based SDRAM controller with a SDRAM model.
Say the PCB delay is 1 ns, shall I delay the feedback clock with 1ns or 2ns (because of the round trip trace on the PCB)?
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