any FPGA design for video frame memory control?

Nov 22, 2003 2 Replies

First reply

Ray Andraka

None that I am aware of, but it is not a difficult design to do. If using SDRAM, you get the best performance by using fixed length bursts (8 beat) and rotating the banks every 8 pixels to hide the precharge.

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Are there any reference designs for video frame memory control logic to work with Philips SAA7111 decoder?



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Thanks,



Wang, Feng


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--Ray Andraka, P.E. President, the Andraka Consulting Group, Inc.

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I've got a cyclone design: Video (SA7113) to LCD Converter ..

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