Differential Pin Pairs in Lattice EC FPGAs

Hi newsgroup,

Altera has a command which is described as follows:

The Show Differential Pin Pairs command shows a red connection line betwee=

n a pair of >differential pins. When one of the pins is assigned to a node = that has a differential I/O >standard assignment, the complementary pin is = considered assigned and unavailable for >future pin assignments.

Does Lattice provide something similar for its EC/ECP familily ?

Rgds Andr=E9

Reply to
ALuPin
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schrieb im Newsbeitrag news: snipped-for-privacy@g47g2000cwa.googlegroups.com... Hi newsgroup,

Altera has a command which is described as follows:

Does Lattice provide something similar for its EC/ECP familily ?

Rgds André

yes they do

antti

Reply to
Antti Lukats

Hi Antti,

thank you for your answer. I forgot to ask what this corresponding command is. ;o) My search in the EC/ECP handbook was unsuccessful.

Rgds Andr=E9

Reply to
ALuPin

schrieb im Newsbeitrag news: snipped-for-privacy@o13g2000cwo.googlegroups.com... Hi Antti,

thank you for your answer. I forgot to ask what this corresponding command is. ;o) My search in the EC/ECP handbook was unsuccessful.

Rgds André

there is nothing special or nothing to know, just use diff prim and connect one iopad the second will be autoassigned - thats it nothing special to worry about

Antti

Reply to
Antti Lukats

Yes you are right, there is nothing special to worry about. The Place and Route Report shows that the second IO is reserved whereas the Post-Place-and-Route Floorplanner does not show any connection between the two IOs. But it should be assumed that the connection does exist ...

Rgds Andr=E9

Reply to
ALuPin

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