Hallo, I'm working on a interface for TI Delta Sigma Modulator. Following a guide I have developed a sinc^3 filter and decimator in order to have an output of 16 bit, from an input streaming of 1 bit.
I have seen the Distributed Arithmetic FIR Filter of Core Generator. There is a way to use it instead of sinc^3 filter to optimize my interface?
Many Thanks Marco