Delta-sigma noise shaping

So, I'm trying to cut through the fog surrounding delta-sigmas, so I don't make (more of) an idiot out of myself. Would some of you more up-to-date types please confirm or correct this picture?

  1. Delta-sigmas are exponentially slow compared to the fundamental quantization rate (BW ~ f_sample/(2**N), as opposed to f_sample/(2N) for a SAR or f_sample for a flash or flash-ish A/D)

  1. Their noise cannot be less than LSB/sqrt(12) in the output noise bandwidth (due to the nature of quantization itself), and only lots and lots of feedback even gets it close

  2. "Noise shaping" is primarily a marketing term intended to disguise the fact that the delta-sigma loop doesn't really have enough loop gain to achieve LSB/sqrt(12) like a decent converter--"Look! Most of that crap winds up where you don't care about it!"

  1. The INL of delta-sigmas is quite poor compared with their resolution, due to limitations in the comparators

So if these things are all true, delta-sigmas are mostly usable for audio rather than for instruments. Right?

Thanks,

Phil Hobbs

Reply to
Phil Hobbs
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"Phil Hobbs"

** I see no sign of that link you promised -

to a HP 400A true rms voltmeter ???

..... Phil

Reply to
Phil Allison

I didn't promise a link, I promised to go and look in my lab. I'm in today, so I just did, and you're right, it's a 3400A RMS Voltmeter. According to my 1992 HP catalogue, the AC->DC converter accuracy is

0.75% between 50 Hz and 1 MHz. Above there the rolloff becomes important, so the spec is 2% to 2 MHz, 3% to 3 MHz, and 5% to 10 MHz.

For hundred-kilohertzy applications like the ones that came up in the thread on this point, a meter like that is the bee's knees.

And now back to our regularly scheduled ADC-advertising-debunking.

Cheers,

Phil Hobbs

Reply to
Phil Hobbs

1 - Yes, although with higher order noise shaping they do amazing things. 2 - I guess, although I don't see your point. 3 - AFAIK the term originated with academic types, and any magic that's attributed to it comes from marketing types who don't understand technology. 4 - That could be, but have you looked at the specifications for the slew of 24-bit, 60Hz update, 8-pin instrumentation-grade sigma-delta ADCs out there?

There seem to be two classes of sigma-delta ADCs: audio, and instrumentation. I don't see a lot of parts that fall in between "way accurate and dog slow" and "moderately fast and 16 bit" (although there are some TMS430 parts that have them).

But I've never had either class of part even vaguely fit my needs, so I've never looked closely at them. Have you looked at the little 24-bit instrumentation ADCs? What has you bent out of shape?

--
Tim Wescott
Control systems and communications consulting
http://www.wescottdesign.com

Need to learn how to apply control theory in your embedded system?
"Applied Control Theory for Embedded Systems" by Tim Wescott
Elsevier/Newnes, http://www.wescottdesign.com/actfes/actfes.html
Reply to
Tim Wescott

We use d-s ADCs in a bunch of our products, and absolute accuracy is stunning, single-digits of PPMs if you do everything right. What perplexes me is that the duty-cycle modulator running at, say, 64 KHz, must have edge accuracy on the order of a few 10's of picoseconds over time and temperature, and phenomenal charge injection behavior, numbers one wouldn't usually associate with a cheap, low-power CMOS process. Granted, the "24-bit" parts are only good to 18 bits or so... but it's a hell of a lot of precision for a few bucks.

A good load cell running into a good D/S adc is an inspiration to behold. Grab a few sundry weights, load them onto the cell in various permutations, do the math.

John

Reply to
John Larkin

Have you looked at this one?

--

John Devereux
Reply to
John Devereux

"Phil Hobbs"

( snip drivel)

** Well they certainly are not and you are showing just what a pig arrogant, septic ASS you are yet again.

Just as that ignorant & patronising attitude to " audio " shows, without a doubt.

Must be time for you to go suck John Larkin's tiny dick - and get another dose of his vile disease.

Rampant ASD ......

..... Phil

Reply to
Phil Allison

Not quite. Modern delta sigmas are multibit: they use a small flash ADC rather then a comparator, and they use DACs in the feedback.

Yes. But it is typical that the noise of an ADC is much higher then LSB/sqrt(12) regardless of the technology.

The noise shaping means that the noise is *actually* filtered out.

Comparator is being zeroed by the feedback path. There is no common mode at the input. The INL is comparable with the resolution.

Delta sigma is the *only* way to make a reasonably fast reasonably cheap ADC with high resolution and precision. What other approach can give you true 20..24 bits? Dual slope integration?

Vladimir Vassilevsky DSP and Mixed Signal Design Consultant

formatting link

Reply to
Vladimir Vassilevsky

Just the smoke and mirrors. (Plus the effort to be polite to my antipodean namesake, which is more difficult than usual today.) And a

10-Hz, 24-bit ADC requires such low drift from the remainder of the signal processing chain that it would be very difficult to verify its performance in a real system. I've seen sooo many people string together "high accuracy" parts like that and expect that their system will be nearly that good when it's done.

That's often perpetrated by ignorant systems engineers, of course--folks who have no idea how hard it is to make accurate, stable measurements of light intensity, for instance, or to get good temperature control using any thermocouple whatsoever.

Cheers,

Phil Hobbs

Reply to
Phil Hobbs

Hmm. So they must digitally calibrate out the DNL/INL of the ADC & DAC, no? The 'one bit' idea makes that go away more or less for free, which I thought was one of the big benefits to delta-sigmas. That calibration would have to be done before the feedback was applied, which could be a mess. Or maybe they servo the thresholds somehow?

And the speed of such a device would be about f_sample/2**(N-M), where M is the number of actual ADC/DAC bits, which could be considerably better, e.g. 16 times for a 4-bit front end ADC.

At very high resolution, sure.

But that's because the noise they're filtering is the huge quantization noise of a 1-bit or 4-bit ADC, right?. Within the measurement bandwidth, there's no way to improve the signal to noise ratio over straight quantization, because any noise filtering you do filters the signal as well.

There is the nonlinearity of the integrating amplifier, though, plus residual errors from the small ADC and DAC, plus code-dependent thermal transients in the comparator (if any).

Used to be the INL was about 1-2 parts in 10^5, which is pretty far from

1 part in 32 million (1/2 LSB of a 24-bit ADC). Has it really got that good? How could you tell if it was or wasn't?

I'm not claiming I can do better--I certainly can't--only that they don't do as well as their marketing folks would like us to believe. Dual slope has problems with capacitor soakage on many time constants, which makes it very difficult to get right, once you get above about

16-17 bits. Intersil used to make a 4-1/2 digit dual slope converter that I quite liked, but it was very slow too.

It isn't that I have something against ADC makers, it's just that when I give people advice, I like it to be accurate. I've wasted a lot of time (especially in learning semiconductor processing) by following bad advice from experts--and as my chemist friends say, "if you aren't part of the solution, you're part of the precipitate." The delta-sigma business seems unusually thick with marketing fog, so I wasn't sure.

Thanks,

Phil Hobbs

Reply to
Phil Hobbs

Interesting, thanks. The fact that the lower 6 or so bits are apparently for decoration was part of what got me going in the first place. I hate it when people throw some fancy component at an ill-conceived system and are then shocked when it's no stronger than its weakest link. Most of the ones I talk to are just starting out and don't have much but the marketing info to go on.

Cheers,

Phil Hobbs

Reply to
Phil Hobbs

Thanks. That looks like a very nice part, but the data sheet droids should be keelhauled.

They're claiming a 100-dB SNR at 2.5 MHz output rate and 112 dB at 78 kHz, which from the usual formula

SNR(dB) = 1.78 + 6.02N

comes out to 16.3 bits at 2.5 MHz and 18.3 at 78 kHz. How can they claim that the device is monotonic to 24 bits when it won't even *sit still* to 21 bits? Even with the input shorted, at the slowest speed, the output noise is -119 dB from full scale, which is equivalent to 19.5 bits.

The INL spec is 0.00076%, which is very good, but also very far from 1 part in 32 million.

This stuff seems to be both sloppy and tendentious, which is a bit of a feat.

Thanks,

Phil Hobbs

Reply to
Phil Hobbs

Aha but I expect you can average it to 24 bits...

I did some tests with the TI AD1252 once and got readings stable to over 26 bits with ~1 second averaging. This was actual readings (from a precision resistor bridge), not shorted inputs.

Might the delta-sigmas be good for histograms? The resolution is so high. It seems like one could take a 24 bit ADC and have say 4096 bins, with each bin 12 bits wide, if you follow me. So the accuracy could be much better than a 12 bit S.A. convertor.

In my experience, in practice delta-sigma parts are relatively noise-immune, and easy to drive, compared to successive approximation.

--

John Devereux
Reply to
John Devereux
[...]

Sorry, meant ADS1252.

--

John Devereux
Reply to
John Devereux

If you can understand a little fairly simple math for a feedback control system, I think you will find the Ubicom ap note on delta sigma ADCs to be very enlightening. Noise shaping is very real: if I have an ADC without it, noise power is pretty much uniformly distributed over the (Nyquist) bandwidth. Running the output through a filter that cuts the bandwidth to a fraction F of the original results in noise power that's the same fraction of the original, so the noise expressed in dB is the original plus 10*log10(F). So for example, with a 1:128 decimation, the total noise drops 21dB. If you start with a 1-bit converter running at 5.6Ms/s, you won't get low noise out of a simple decimation down to 44.1ks/s. But delta-sigma will get you to a very decent noise level, because it's shoved the noise up to high frequencies and then filtered it out.

Though I've seen other ap notes and articles about how delta sigmas work, they either glossed over how the noise shaping is actually accomplished, or were so theoretical that you (well, I at least) couldn't see the forest for all the trees. The Ubicom ap note starts with a first order modulator, where the math is straightforward and you can see just how the shaping happens; it's not hard to see then how a higher-order modulator will allow better performance.

It's a bit of a pain to get into the Ubicom website to get the paper, but it can be found here at the moment:

formatting link

I don't know why you'd say the INL is quite poor; the linearity I've observed is extremely good. We have to go to some serious pains to add dither to the input to pipelined ADCs, and then remove it digitally at the output, to get similar performance. Delta-sigma converters made life a whole lot easier when they became available. Now if I could just get them with 100Ms/s output rate at 16 and more bits resolution...

Cheers, Tom

Reply to
Tom Bruhns

Well, certainly not all are. The best linearity comes from the single- bit ones, since with multi-bit, you're stuck with the linearity of that small flash affecting things. A single bit comparator is (theoretically) perfectly linear, in its binary way.

Cheers, Tom

Reply to
Tom Bruhns

Sure, but that's noise averaging, not monotonicity. You can do that with any noisy ADC. Pure specsmanship.

Delta-sigmas probably are good for histograms, if they're binned fairly wide to avoid the noise smearing, because the DNL is going to be pretty small compared with even a 16-bit SAR.

Single-slope converters are the usual choice, but if you need a whole lot of bins, a delta-sigma is probably a good choice.

Thanks to all for an interesting discussion.

Cheers,

Phil Hobbs

Reply to
Phil Hobbs

[...]

I don't disagree - but manufacturers always seem to say their ADCs are "monotonic", yet most have a "transition noise" of several lsbs. So they always mean "if you average", as far as I can see.

[...]

--

John Devereux
Reply to
John Devereux

Some people use a fast SAR converter. An additional DAC adds pseudo-random noise to the analog input, which is subtracted out digitally... dithering with undithering. They use a lot of noise, many per cent of the adc range. This smears the operating codes all over the landscape, making the dnl/bin size as good as a single-slope, or better, but it's fast.

Nice trick.

John

Reply to
John Larkin

The "pseudo-random noise" can be "special flavored sort of random" instead.

The scaling between the added noise in the analog and the digital numbers subtracted is tricky to get exactly right. If you only care about some frequencies and not others, you can flavor the noise so that it doesn't contain the frequencies you don't care a lot about so that the left over noise is elsewhere.

If your ADC is running much faster than your reporting rate's Nyquist, you can put the noise above the band of interest then filter it out with low pass filtering. This can make the electronics quite a bit simpler because in this case you don't even need the digital subtract so you don't need to know what the noise really looks like at the input of the ADC.

Reply to
MooseFET

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