three types of delays are being modelled
1 block delay (Delay Through a BLE) = 0.1
2 Intracluster net delay = 0.1
3 Intercluster net delay = 1.0 The above values are default values We can also specify different values. Can someone give me an insight bout how these values are being assigned and how 'll overall circuit delay change by changing them.The author just says they got these values as most suitable by experimentation. Here is the paper describing TVPACK ->
The values are above are estimates of the relative value of the delay through a BLE (LUT), the delay to use local routing within a cluster (LAB in Altera terminology), and the average delay to route a connection between clusters (LABs). Since placement and routing hasn't been performed yet (you're clustering the circuit before placement and routing) you can only crudely estimate the delay of a net that isn't captured within a cluster. In the equations above, it is saying that
LUT delay = local routing delay inside a LAB Average routing delay for connections between LABs = 10x LUT delay.
The quality of the packing you get isn't too sensitive to those parameters, so it isn't worth getting too hung up on their precise values.
I would say that in modern FPGAs, the delay between clusters/LABs above is a bit too pessimistic for connections that are on or near the critical path. They probably usually get routed with a delay that is ~3X - 5X the delay of an "average" path through a LUT (each path through a LUT has a different delay, but the T-Vpack delay model doesn't take that into account). Local interconnect within a cluster is still about 1X - 1.5X the delay of an "average" path through the LUT, at least for the FPGAs I'm most familiar with.