Can i verify RAM content with ISE simulator?

Hello from Diego Italy Another newbie question

I'm using XilinxISE 9.2 on a Spartan3 XC3S1500 I would like to implement a simple dual port ram using the fpga block ram resources. After setting enable pins,active levels and so on i did a TestBenchWaveform Say that i write in RAM-PORT_A locations 0x0,0x1,0x2 the same 8 bit value,say 0x54 Changing some signals i go to read in RAM_PORT_B locations 0x0,0x1,0x2 The result is undefined"UU" It is likely due to my errors.But i dare to ask if the ISE is able to simulate the writing,reading and the content of such a ram?

Thanks to everybody and have an Happy new Year

Diego Milan,Italy

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