Adding Desing to an Xilins Platform Studio project

Nov 28, 2007 0 Replies

Hi, I'm trying to add an existing project which successfully synthesized and simulated with ISE 8.2 and Modelsim to an XPS-project. It's verilog / VHDL Mixed, with the top-module being verilog with vhdl and verilog submodules. so I started using the import peripheral wizard, and it is recognizing my .prj file correctly.



However I get an error in the HDL Analyzing Step: HDLCompilers:87 - "C:\.....\top_module.v" line 217 Could not find module/primitive 'sub_module'



"sub_module" is a vhdl-entity though.



An I can't see any message in the log file like "Compiling VHDL Moduel..."



Only verilog-messages are appearing. In the HDL Source File Path the VHDL-Files are recognized. Yes, I put the language-droplist to mixed.



any hints?



Timo


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