Actel Fusefile Reverse Engineering

Any answer ? Please .....

: Any answer ? Please .....

Search the net for FPGA reverse engineering. I think after that you will give up...

If you don't remember, it's probably the default. Check with Actel and measure a programmed device for output swing and input thresholds.

-- Mike Treseler

This might work. Create a new design and compile it twice to get the same format fusefile, once with PCI and once with LVTTL without making any other changes. Then compare the two files to see what's different. Then see if the difference is evident in your old fusefile.

Take your design, and change ONLY the I/O standard in the area you are unsure about, then compare the final fuse files. When you have the I/O standard matching, the files will compare without error. [ This presumes your design has NOT changed in the meantime... ] Or, you could go to your backup files, as the I/O standard is unlikely to have changed since the PCB was designed ?

-jg

Why not regen the bit file, 1 for each IO option and do a bin diff against what you have. One should match!

regards

johnjakson_usa_com