I am trying to get a floating license for Actel Designer. When I enter the hostid of my machine (running slackware linux 10.0 ), I get a response from register.actel.com saying that it requires a 8/12 byte number where as the 'hostid' command on my machine returns a 7 byte one. prepending a '0' to the number didn't help either. Is this a problem with slackware or with the registration software ?
Hello Geoerge,
have you tried lmhostid from the flexlm utilities? If that does not work, try the MAC address of your ethernet card.
The hostid command doesn't seem to be appropriate in all cases.
HTH & HAND, Steff
....
Thanks Steff, I got the registration done. It is strange, but I got a
9 digit one from lmhostid. However, I prepended 000 to that and got it registered. BTW, looks like mac address (from ifconfig) is same as the lmhostid value.Thanks again, George
Hi George,
The lmhostid is indeed the same as your MAC address. As far as I know flexlm still doesn't support hardware keys under Linux, thus you can only use the "easily changed" MAC address.
Did you manage to install Designer on Slackware? I tried it on my Gentoo machine but it complained about the ksh interpreter,
Hans
Hi Hans,
I got it working partially. designer pops up a gui and I was able to start the compile session. But that was it, it crashed then. lmgrd message says the designer was able to get the license.
Later I decided to install RH9 and try it again. This time I faced the same issue of ksh, but I copied it to where the install shell was looking for it and got everything installed fine. I got designer running all the way to place and route. One difficulty I had was that I didn't had a synthesis software giving edif output suitable for designer.
First I tried icarus verilog, but the output lacked instantiated pads. Also it adds some macros that are actel reserved ( like and2 etc ). Then I tried a simple hand written verilog netlist and got it compiled, placed and routed. Everything went fine.
It is sad that there is no license to run the software further. It is not possible to program an fpga (download it to the chip ) with the eval license they are giving. Hope they will change the licensing terms and let linux also get an years free license!!
On the sythesis side:
I am hoping that the vhdl compiler that comes with Alliance vlsi tools will be usable by designer. It gives out a vhdl netlist, and I hope designer will accept it. Got to try it though. Probably one will have to use some script to insert pads on the top level netlist before feeding the synthesised netlist to designer. ( As for icarus, there is only edif,xnf out but there is no verilog netlist output. I find verilog output easy to hack :-) This is really sad.)
Thanks, George
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