Anchor escreveu:
Since you didn't mention your cost requirements, it seems to be easily implementable in a small and "slow" fpga like the EP1C3T100C8 from Altera or XC2S15-5VQ100C from Xilinx.
Ricardo
Anchor escreveu:
Since you didn't mention your cost requirements, it seems to be easily implementable in a small and "slow" fpga like the EP1C3T100C8 from Altera or XC2S15-5VQ100C from Xilinx.
Ricardo
Have something to add? Share your thoughts — no account required.
Ask the community — no account required