I would appreciate someone who can answer some questions about OMAP MMU usage. Probably someone with knowledge about any chip with a memory management unit could answer since these are very basic questions...
TI's OMAP requires the MMU to be enabled if you want to use the data cache, but I don't understand why... is it required whatever the chip is?
It seems to me that MMU manages logical memory addresses and memory protection, but I do not see any relationship between these MMU task and the data cache, probably due to my inexperience...
Another important question for me is how much RAM the MMU needs to perform logical to physical addressing. Has this amount of RAM a fixed value? If I just want to use the data cache but I don't mind about address translation nor about memory protection, do I still need some RAM memory?? How much??
Thanks to all