The task is to boot the Cyclone FPGA from CPU. The standard way for doing that is Jam Bytecode Player available from Altera. It is workable, however for the good variety of reasons, this JBC player is PITA. It seems possible to take the player output as a bit stream, pack it into a binary image and boot the FPGA by bit-banging from this image. The idea looks pretty obvious, and not difficult to implement. I am wondering if somebody does it that way, or what could be the reasons for not doing it.
- Are there standard tools to convert JBC to binary bit-banging image?
- Did anyone try loading Altera FPGAs by binary bit banging rather then using JBC player?
- What could be the pitfalls of the "binary" solution?
Vladimir Vassilevsky DSP and Mixed Signal Design Consultant
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