I am looking for reference materials and design ideas for implementing a customized high speed synchronous serial communications solution over a fiber optic cable pair (one for Rx and the other for Tx). This link would be between two system boxes and would require a net data rate throughput of 100 megabits per second. I would anticipate that the link logic would be implemented in FPGA technology on each end. The primary function would be to deliver about 100 bits of internal FPGA state on each end to the links to the other end in frames that would occur once per 1 millisecond. One end would act as a master framer while the other end would be a target responder to accept the master 100 bits/frame and respond back with a return frames of 100 bits. The design will need to be of a continuous flow nature such that to the master end of the link the would literally comprehend the target end as a remote extension end of itself. State control logic in the master end would simply be reflected to the target end with 1 msec latency and the status of the target end would appear back at the master end with an additional 1 msec latency.
What would be the best recommended modulation technology for the FPGA to generate the frames going out onto the fiber optic cable? The protocol used would need to be one such that the receiving end can recover clocking from the data stream. Is good old Manchester encoding the best for this or is it better to use one of the bit stuffing protocols?
Any discussion on the topic welcome.