about mpc5200b rtc driver.

Dec 10, 2008 2 Replies
L

Hi, i am developing a mpc5200b rtc driver. here is the steps I must follow when I set the curret time.



  1. Write register with pause_time 1 and set_time 0
  2. Write register with pause_time 1 and set_time 1
  3. Write register with pause_time 1 and set_time 0
  4. Write register with pause_time 0 and set_time 0

I think these step's order is fixed, step 2 can not run before step



1.Of course my code follow these steps exactly.but here I have some question.

When I read some linux kernel souce code, I found there's a lot of place use memory barrier to control CPU execute instructions step by step. I want to know, whether my mpc5200b rtc driver need these memory barrier to protect the order of my code like above.thanks.


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M

If I recall correctly, accesses to memory mapped as GUARDED will not have access reordered by the processor. So the answer is as always ... it depends. :)

Michael N. Moran (h) 770 516 7918 5009 Old Field Ct. (c) 678 521 5460 Kennesaw, GA, USA 30144 http://mnmoran.org "So often times it happens, that we live our lives in chains and we never even know we have the key." "Already Gone" by Jack Tempchin (recorded by The Eagles) The Beatles were wrong: 1 & 1 & 1 is 1
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J

Memory barriers are more intended to keep the hardware and assumptions made in the compiler in sync. But PowerPC handles in hardware reads at higher priority than writes. So in the worst case your device will "see" reorderd accesses (write, write, read will be changed to write, read, write). To avoid it, use the access macros (or inlines) that are part of the kernel (in_be32/out_be32 and so on). They all ensure that no hardware reordering will occure.

jbe

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