Impedance calculation (CS stage)

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electronics 9 years ago

Hello.

I am trying to calculate the output impedance for the following circuit in SPICE notation (CS stage with drain-gate feedback):

input signal vin 1 0

output signal (output port, where impedance should be calculated) vout 3 0
resistors rs 1 2 rf 2 3

nmos (drain, gate, source, bulk) mosfet1 3 2 0 0

Unfortunately, I am getting odd results in SPICE, probably because the circuit I entered was missing the DC bias.

But, apart from SPICE, I would be mainly interested in the analytical solution as a function of rs and rf...

Can anyone help ?

Thanks !

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J

Jim Thompson 9 years ago

Approximate MOSFET as a controlled current (drain-to-source of value gm*Vgs) with drain-to-gate capacitance, Cgd, and gate-to-source capacitance, Cgs.

For paper analysis you don't include a bias source, you've assumed a gm value.

For simulation you use a proper MOSFET model and include a bias source so as to cause enough current to flow to get a good gm. ...Jim Thompson

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J

Jim Thompson 9 years ago

It occurs to me that there is a fundamental problem: Only a resistor, RF, from drain-to-gate forces the MOSFET to have (at DC), VDS=VGS, in other words, the _diode_ connection... so impedance measurements will be at the "knee"... not a very useful value. ...Jim Thompson

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Impedance calculation (CS stage)

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