you have Cds2 connected at the output. Shouldn't it be connected in parallel with Ro1; that is, across the gm2*Vgs2 source?
Also, I need to know what values you used for Ro1 and Ro2.
In the earlier schematic of the CS amplifier, you have an Rd value of
4.7 ohms. The cascode has an Rd of 600 ohms. Are you using 600 ohms in both amplifiers for this most recent calculation?
Are you expecting a large difference in the 3dB frequencies? I derived the transfer function for the cascode, and when I plot it versus frequency up to 1 GHz, I find the roll-off is dominated by the 600 ohm Rd and the 250 pF output capacitance. The amplifier parasitics don't matter much in either amplifier. I don't have Ro1 and Ro2 in the derivation, so when you give me those values, I'll put them in and see if they make much difference.
I'm getting values of around 200 MHz for the frequency at which the voltage output is down by half for both amplifiers. Perhaps the missing Ro1 and Ro2 may make a difference, but I don't think it will change by very much.
Isn't Cds2 the capacitance from the drain to the source? That's why it is designated Cds, the ds meaning drain to source, not drain to ground. It would go from the drain to ground only if the source were grounded. There is of course a capacitance due to the package which is from drain to ground, but Cds is internal to the chip, and goes from drain to source.
Since in the cascode, the source of the second FET isn't grounded, I think you need to connect it across the second current source which represents the effect of the second FET.
It doesn't have much effect connected the way you have it because it is completely dominated by the 250 pF output capacitance. But, if it is connected across Ro2, then it will have an effect, expecially if the 250 pF is removed. I'll run some more simulations and report on the results.
I will add Ro1 and Ro2 to the circuit and run the simulation again. Then I will remove the 250 pF output load and compare the performance of the two circuits. Perhaps then, without the 250 pF load, the cascode is better than the CS.
Are you in Italy? I guess it's Sunday there. I am a night person, and I'll be up for a few more hours. I'll probably be able to do this in the next hour or so.
Ok sorry, I didn't tell you that the *only* capacitance I'm going to put in my work are Cgd, Cgs and Cdb and NOT Cds.
take a look here at page 15:
( When I wrote Cdb2=Cds2 I meant (sorry) that I'll not consider Cds2 but only Cdb2. However I think (if I had used it) that Cdb2 should have gone in parallel with Cds2 because the source of the second MOS is connected to the ground and the bulk too )
I think that the source of the second mosfet (the upper one) is grounded because the source is connected to a costant voltage generator => in the small signal model is grounded. I checked it in some diapos I found in the web.
This'll be very interesting ..I would have done it if I had had a simulator!
yes I'm in Italy! it 11 in the morning here. yuor help is very appreciated! ..I'm only trying to understand why my cascode doesn't go better than the CS ;)
Look carefully at the PDF you gave above. The source of the second FET is not at AC ground; there is a current source connected between the source and the constant voltage generator labeled Vss. Current sources have high impedance. The gate of the second FET is connected to a voltage source, not a current source. Therefore, the gate of the second FET is at RF (AC) ground. If the source of the second FET were also at RF ground, then the second FET wouldn't have any gain because both the gate and source would be grounded.
In the earlier post where I said that I go corner frequencies of about 200 MHz, I had used a value of Rd of 4.7 ohms for both amplifiers.
Now that I have used 600 ohms for Rd in both amplifiers, and with 250 pF connected at the output, I get a corner frequency of 2.25 MHz for both amplifiers. The frequency response is totally dominated by the 600 ohm and 250 pF combination. I notice that your book doesn't show a large capacitor like 250 pF on the output of the cascode.
In order to get a large bandwidth, it is necessary to remove the 250 pF capacitor on the output. When I do this, I get a corner frequency of about 490 MHz for the CS amplifier and about 504 MHz for the cascode.
The purpose of a cascode is to eliminate the Miller effect reduction of bandwidth. If I reduce Cgd to zero, I see only a small effect in the simulation. I think that your FET has such a low Cgd (124 fF) that the Miller effect is almost negligible even in the CS amplifier, so that the cascode doesn't show much improvement.
I think I have misread your schematic. I read Cl as *250 pF*, but it appears that it is actually 250 fF. Is this correct? I thought your script character was a "p" when it's actually a "f". It might be a good idea to print. :-)
With this change, I now get a corner frequency of 315 MHz for the CS amplifier, and a corner frequency of 984 MHz for the cascode.
By the way, I decided to double check your calculations from your original post:
hi all, I calculated the frequency response of the CS and Cascode amplifiers using the time constants method. Here they are:
f = ( 2*PI*( Rs*Cgs + Rs*Cgs*(1+Av) + Rd*(Cdb+Cl)) )-1