xor mixer

The great virtue of ECL is that it is current steering logic, so the ECL rails are way quieter than TTL/CMOS power rails. If you get enthusiastic and use balanced ECL inputs and outputs, the rails are even quieter.

For mixed signal design, ECL is very handy, even when you don't really need the speed, and it struck me - back when I was more closely involved - that the preponderance of ECL-interfaces on fast A/D adn D/A converters was driven by that.

I don't dispute that. I was just pointing out that the phase noise or jitter performance of ECL is not that great compared to some CMOS. I think part of it is that the slew rate of the CMOS signals can be quite high compared to ECL. High slew rate is good, because it gives you less picoseconds of jitter per millivolt of input-referred additive noise exhibited by the input of the following logic stage.

I'm not sure how good off-the-shelf CMOS logic gates are - I guess it is hard to buy anything faster/smaller than 0.5um gate length except in a FPGA. If I remember correctly, an old Philips 74LVC04AD gave about 250ps rise and fall times on a 5V supply, so that would be 16V/ns slew rate, so I guess you could expect about 65fs of jitter per millivolt of noise in the following stage within its bandwidth. It would be interesting to measure how much jitter each stage of those gates adds, but I don't really have the equipment to do it easily, or the time to do it not-easily.

Chris

Ouch. I thought a low Early voltage was a significant source of intermodulation (nonlinearity), and a bad thing in a mixer. Why isn't that a problem in the HFA3101?

The '3102 has two 10 GHz diff pairs, the '3048 has an 8 GHz pair, and the '3127 has matched 8 GHz transistors. The capacitances are also very low, well under 1pF. But watch out for the low betas and Early voltages. Have fun.

The large emitter inductance of those transistor arrays poisons the differential anplifiers because you cannot get COMMON emitters at those speeds. That is even worse for the space qualified flatpacks that I had to use.

And I found it impossible to build a current mirror that was better than a simple one with the PNPs of the HFA-chips. By the time it was stabilized with resistors most of the speed advantage was gone. And the base stoppers count for Rbb, noise-wise. I took them anyway; there were no better pnps available.

If you can use discrete transistors, the Infineon BFQ790 could be interesting. It has no bond wires in the emitter; the emitter is directly soldered to the center pin of a sot-89. One could place two of them next to each other and have a wide highway for the emitter currents. The BFQ790 features a funny Early behaviour. Any idea why?

And, since 1/f noise is proportional to current density, the large chip may help. The corner is probably high enough b/c of ft. :-(

When using PECL, remember that a high level carries the full VCC noise without attenuation. With NECL it looks somewhat better.

For low noise mixers, the diode ring is probably still the best.

There is a publication from nist: "Residual PM Noise Evaluation of Radio Frequency Mixers" by C. A. Barnes, A. Hati, C. W. Nelson and D. A. Howe filename is probably 2556.pdf

They come up with a ring mixer made from diode- connected 2N2222 that seems to be interesting. JL had recently an idea with diode-connected phemts, I wonder how they would perform. Well, above 1/f.

Is Fred Bertoli (sp?) still here? I'm currently playing with a flock of Interfet IF3601 (really somewhat presorted as 3602) IIRC he has done something similar.

regards, Gerhard

You can cascode them if it's a problem. To leading order in beta, it's only the actual diff pair that matters. A good opportunity to try my nice SiGe:C cascode trick.

If you run a BFP640 without its emitter grounded really well, you have to put a bead in the base or else it'll oscillate at 12-15 GHz. I usually use a Murata BLM18BB05 or BLM18BB10, which work fine if you don't need the transistor's full speed.

On the other hand, its Early voltage is effectively infinite--the DC collector curves actually show a negative resistance due to heating, but at AC they're almost perfectly flat.

Cheers

Phil Hobbs

CMOS logic is generally single-ended, so power supply noise appears directly on an output. And CMOS has a ghastly delay TC, many ps per degree C, so minute temperature fluctuations get mapped into phase noise. Agree that on-chip logic is always faster than off-chip.

Analog Devices makes the best, fastest comparators around, and they are ECL/PECL. We have often lamented that there are no LVDS logic gates or flops.

It's hard or maybe impossible to directly measure fs jitter. My customer needs low jitter but they characterize performance in terms of the single-sideband phase noise spectrum, which is hard to measure (hence this thread!) but not impossible.

Correlation techniques are used to lower the noise floor of phase noise measurements. I suppose the same thing could be done in time domain, except that mixers are a lot cheaper than oscilloscopes.

NBSG86 is about the fastest XOR gate around, but it's a universal any-function gate so probably has more paths than it strictly needs.

One nice thing about differential ECL is that gate inputs don't load the signal much. So I could have two compete signal paths - XOR, diff pair maybe, filter, amp, ADC - hung on the same ECL signal pair. Then some correlation math on the ADC data can, over time, wash out the noise of the individual signal paths.

I guess the same trick can be done with Gilbert cells.

Isn't a SY58051U CML gate exactly what you want? There are faster versions also for 10 GHz. Or the gate that you have and a CML driver?

regards, Gerhard

XOR_Mixer.JPG

Got a white paper that happens to treat this in the context of finding phase errors?

It still seems that with a good square wave on the LO input and a high- level RF input, the noise could be made almost arbitrarily low (well, assuming that you aren't burning up the diodes). I want to see where I'm wrong...

A pair of phemts would work with ECL swings, but I don't know if the phase noise would be any better. Phemts have horrible drain slopes (Early voltage) and horrible 1/f corner frequencies.

The noise problem with diode mixers (and XOR has similar issues) is that it saturates; the signal only activates the mixing mechanism at edges. So, the duty cycle of that edge transition becomes the ONLY sensitive part of the cycle, and that implies that you have sensitivity at all of the (odd) high frequency harmonics of the intended signal, because they are now aliased.

Even if the device doesn't, on paper, have higher-frequency gain, it DOESN'T HELP, because noise needn't come in through an input pin; your SPICE model fits the noise injected from a wire, but not generally the noise present in the device.

Saturation is good, because it makes the detected output independent of the signal amplitudes. The Gilbert cell, driven by ECL, will do that. So will an XOR feeding some saturating current steering thing. The diode mixer is somewhat sensitive to the input amplitudes, depending on how hard you drive it.

Sure, if the mixer saturates, all the information is in the edge timing. But that's good.

A ECL XOR feeding some current-steering schottky diodes is interesting. Diode reverse leakage current matters, but shouldn't be too bad, way less than the base current of an NPN.

That's true of the LO amplitude, but not of RF input, or device internal noise sources. Getting rid of one problem, but leaving others, and introducing new ones...

Why? A continuous-multiplier mixer doesn't sense noise from inband harmonics of one input signal, but a switching/XOR mixer does. It's aliasing that noise source so you cannot later filter it away.

I have two 150 MHz square waves and I want to evaluate the phase noise between them. Neither is explicitly RF or LO.

Later on, I may do a PLL using a very good OCXO, but the signals will still be square waves and the phase detector noise is still critical.

The XOR phase detector output DC level vs phase difference is a simple triangle. All that frequency-domain aliased harmonics thinking washes out. Sometimes what's complex in one domain is simple in the other.

Would that work with the HFA3101 though? The collectors crossing between the two pairs are already tied together. Actually... perhaps it would work! That would be a cunning trick. All the nice speed and matching of the 3101, with much more gain and linearity, just for the price of another couple of transistors. It would be very good on the input of an all-band receiver.

I'm keen to try that sometime. The dual-gate GaAsFET that VK3YNG used in his foxhunt sniffer is now unobtainium, and I think that this approach (with either a dual-gate FET or a parallel pair of FETs) could give the same linearity and extreme dynamic range that he obtained (almost 140dB of AGC, +-70dB) in a single stage. This is necessary for foxhunting if you want to avoid switched attenuators, because you want accurate RSSI sensitivity from 1V of antenna input, without swamping or IMD. If you're hunting a 30W TX that's well hidden, there's nothing more annoying that to arrive first, and discover that as soon as you're inside the 15m radius, you can't get a direction any more because your front-end is swamped - and the signal is no longer *somewhere*, it's now *everywhere* - but you still can't see the TX!

That's similar to the NBSG86 with, unfortunately, a different pinout.

The '86 is maybe a bit faster, and has more (true ECL) output swing.

The Johnson noise on the 50 ohm, 400 mV CML output will be significant. But so will the Johnson noise from the resistor at the bases of the '86 ECL output transistors. I guess the trick is to keep the edges really fast and drive some very fast threshold/saturating device after the XOR gate.

This is really hard.

Am 31.05.2016 um 23:20 schrieb John Larkin:

Why don't you do it like everybody else and mix the two 150 MHz waves down to 1 Mhz or even less with 2 ring mixers and a common transfer oscillator? This is called DMTD, Dual mixer time difference system. Your problems shrink by 20 log(149) dB.

Same phase changes, but now on two 1 MHz carriers.

Most of the noise of the transfer oscillator is common mode and vanishes. A little bit stays since you de-correlate your zero-crossings by upto 1 usec for the zoom wrt the xfer osc. So it still pays to be not too shabby with the oscillator.

I did that to the 100 MHz outputs of a cesium and a hydrogen maser with ordinary MCL ring mixers. After limiting, then there is a second stage in the following FPGA with D-FFs as mixers and the conversion clock derived from one of the signals.

regards, Gerhard