Hi
I have been think and part time working towards a goal to make useable and useful serialized processor. The idea is that it should be
1) VERY small when implemented in any modern FPGA (less 25% of smallest device, 1 BRAM) 2) be supported by high level compiler (C ?) 3) execute code in-place from either serial flash (Winbond quad speed SPI memory delivers 320 mbit/s!) or from file on sd-cardserial implementation would be smaller and run at higher speeds, so
128 clock per machine cycle would already mean 2 MIPS, what would be acceptable for many applications.Parallax basic stamps I executes 2KIPS only, so ultra lite serial processor in FPGA with 2 MIPS would be eh, for me its some to dream off :)
I have poked around this idea for some years, but never got the "final kick" to really go and do-complete the design and development of this processor.
So I decided to offer some bounty for others to maybe motivate to work for this goal and dream, current list of items available for the developers from my own funding is listed here (I hope to add items and maybe some $ by the time)
there is also very preliminary spec-goal document as well
Antti Lukats