Verifying Chip Capacitors

Guilty! I never use Excel unless somebody sends me a spreadsheet and I absolutely can't avoid opening it. Yucch. It's almost as brain damaged as PowerPoint.

Actually, I usually let somebody else open spreadsheets for me, and print them out.

Some of my customers *think* in Excel and PowerPoint, and it shows... their thinking is seriously constrained, like living in a cartoon world. Excel and PP seem to destroy peoples' ability to think and write clearly.

It's funny how many people are described as "tech savvy" these days. That means they can use Excel and Facebook and punch buttons on their smart phones. Not

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I think it was a 3090ES, around 1991ish.

Cheers

Phil Hobbs

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This was a little more serious than bypassing FPGAs:

It's the output stage of a 17 kilowatt MRI gradient coil driver. A 120 amp output pulse settles to PPM levels in 100 usec or so. On a thing like this, current sloshing around, drops in traces, transient thermoelectrics, and even eddy currents in heat sinks, matter.

There are times when power distribution dynamics needs a lot of attention. In most products, it doesn't.

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If the pours are electrically stiff, the stuff works.

add

What is engineering. Should I claim that 94.831% of our stuff works the first try? Over what time base?

What fraction of your designs work, can be shipped with minimal hacking, on the first try, the first PCB etch?

Do you do a full frequency-impedance analysis of every power plane on every board that you design, in the context of known dynamic chip power requirements? If you don't, you are following rules of habit, which is essentially superstition. I do that too, I just have simpler rules.

I don't add caps until it works. I put a few on the schamatic, place them on the PCB layout, and it works. It's not worth hours of engineering to either make it (somehow) work better, or to pull a few cents worth of caps off the BOM.

It's too easy a problem to spend much time on.

Well, we've recently done 4-lane and 8-lane PCI-Express-over-cable boxes, but that's only 2.5 GBPS per lane. No *full* design analysis, not many caps, all 330 nF and a couple of polymers, works fine.

He's only talking about one CPU. There are as many as six in a 3090, plus two channel directors (essentially another 370 style CPU) and channels (perhaps 256 I/O ports).

Mainframes weren't so much computing machines as information switches. Databases were where the money was, not MIPS.

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Oh yeah. The bragging rights are in MIPS/MFLOPS but the money is in databases; think search engines yahoo, google, ask, etc.,

?-)

I used to maintain a Z80B video effects system that had a 1000 A, 5 VDC power supply to manipulate live NTSC video at a broadcast station. It filled an entire rack.

On Tue, 15 Jan 2013 21:41:58 -0500 rickman wrote in Message id: :

There was a system built back in the mid 90s that utilized 9000 Pentium Pro CPU chips that was built for the Dept. of Energy. I was hoping I could find some more details on the power supply (although there may have been multiple power supplies) but there doesn't seem to be any thing out there other than total power consumption of 800KW. If it was a single power supply it must have been a monster.

Funny that just 10 years later and you could have the same processing power with only 44 quad core Xeons.