Using reverse biased zeners to correct for mosfett turnon voltage in a push pull stage

Well, then the path looks pretty clear to me. You have to refine your own design. Maybe start with stabilizing the bias.

Can you stop the scan of the microscope once in a while when it hapens to be somewhere in the middle, or let it run towards the middle, auto-correct the bias and then continue the scan? Essentially similar to how blacklevel-clamping operated in the good old analog TV days. The days when TV actually worked all the time.

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Regards, Joerg

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Reply to
Joerg
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I think based on the suggestions i got here what i will try is going with ofsetting at least a part of the bias statically. Since i have the luxury of just having to get to run individual amps and not mass produce them i could match the bias to the individual transistors. I might be able to reduce the crossover distortion enough by forcing the deadband from 8V down to 1-2V. As transistor offset voltage is linearly dependent on temperature I might get away with it as long as i don't heat the zeners. I'll have to think more about if the condition that the opamp, if fast enough, will charge the transistors itself is not actually something i want, as it will lift the slew limitation while simultaneously relieving the capacitive load over the deadband on the opamp. I might be wrong, but I don't yet see where there fallacy is there, so I'd be glad if someone points it out before I do it. The other way to go would maybe be to use a level shifter (bjt with two resistors and a current source) to bias the push pull.

Thanks for all the suggestions though.

Reply to
Adrian Nievergelt

Meh, not so terrible:

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Just tedious.

All those mirrors would look better in an IC, of course. Add cascodes, improved mirrors (Wilson, etc.) where desirable.

Simulations of this circuit show it goes great up to 10MHz or so, though the phase shift is far too great at that frequency to close the loop. Still, bandwidth in the 100s of kHz is easily achieved, and probably pushing it to

1 meg closed loop is possible. To get that bandwidth at low distortion will require lots of loop gain somewhere, as the OP mentioned; compensating that shall be left as an exercise for the end user. :)

Also, as posted elsewhere, cost is apparently no object :)

Tim

--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
Reply to
Tim Williams

Probably best to post a schematic here showing how you want to build it. The risk with zeners like in the example you brought is that they charge the gates fast but the discharge is slow. That does not make for a very linear operation.

Also, the threshold drifts with temperture and since the FETs are the parts that will become the hottest that needs to be reckoned with.

Personally, I'd servo it. Since the piezo is a capacitive device it cannot have a DC part in its current so it should be possible to lock the quiescent current.

--
Regards, Joerg

http://www.analogconsultants.com/
Reply to
Joerg

If one is willing to do it in discretes it is not such a cost concern. After all, back in the days of fast analog scopes they had pretty high voltage plate deflection amps and those had to be pretty darn stable in the DC and linearity.

--
Regards, Joerg

http://www.analogconsultants.com/
Reply to
Joerg

The configuration i would try to build right now would be

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with the zener voltages below the respective threshold voltages.

I don't exactly get what you mean by servo it, care to elaborate? Google only turns up that servo seems to be the same as buffering.

Reply to
Adrian Nievergelt

It's funny, back in the 10MHz Tek days, I bet they would've loved having some of the later TV tubes -- video output amps and such, huge transconductance (some of them comparable with JFETs in current capacity, gain and cutoff voltage, at a few times higher terminal voltages). By my estimate, 7KY6 for example (which is usually pretty cheap even these days) can do 5MHz bandwidth pretty easily, which means they'd be able to do 10 or

20 with some effort.

But, the price for the cutting edge demands that one cannot wait, and thus distributed amps and hybrid circuits were used.

But even those caught up, and the newest vertical deflection circuits were quite involved indeed. Pull ups, pull downs, pulls up and down for the pullups and pulldowns, etc. Double complementary double balanced and who knows what else...

...Then they introduced distributed deflection plates and, with MCP, pretty much finished the history of analog scopes. :)

Tim

--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
Reply to
Tim Williams

Big fets, and power supplies, and heat sinks are expensive. Opamps and sip dc/dc converters are cheap.

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That removes threshold voltage variations from the situation, has tons of fast gate drive, is thermally stable, has very low distortion, and swings all the way to the power rails.

It will need some details, like not blowing out the opamp inputs at startup, and maybe current limiting, stuff like that.

--

John Larkin                  Highland Technology Inc
www.highlandtechnology.com   jlarkin at highlandtechnology dot com   

Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom timing and laser controllers
Photonics and fiberoptic TTL data links
VME  analog, thermocouple, LVDT, synchro, tachometer
Multichannel arbitrary waveform generators
Reply to
John Larkin

Uhh... i _really_ like the idea of using low frequency integrators to correct dynamically for any threshold voltage. The two additional opamps will introduce a tiny bit of noise, but really nothing to write home about. This should get nearly completely rid of any THD. I'll try if i can get this to run in my suspended rail configuration to make it swing

120V+. Thanks a lot for the suggestion. If you're interested I'll post some results and actual schematics when i get them.
Reply to
Adrian Nievergelt

You don't want them in the actual drive path. Capacitive coupling might help. As long as they don't DC-restore.....

The gate load, being capacitive, should return all charge as the signal reverses polarity.

RL

Reply to
legg

Don't know if this is relevant. This month's edition talks about drivers.

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I don't understand the objective. Is trajectory important? Or do you just need to get from one physical location to another fast and not worry about the path from A to B? You can do some interesting things by pre-calculating charge levels and stuffing in an approximate impulse and let the loop take care of the details. Very messy...

Also, I don't think you have ANY room for a dead band. If the loop opens, you're screwed.

Reply to
mike

Only in class A operation, otherwise your average supply current depends on the AC output current.

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Thanks,
Fred.
Reply to
Fred Bartoli

Hmm, that one is not very encouraging. It might work with capacitors across the zeners but the opamp is not going to like to drive that. You'll probably be better off completely rolling your own amp like Tim suggested. If the Apex ones aren't fast enough that is pretty much the end of the rope in terms of power/voltage/speed.

Another thing you could try since you already have an Apex amp is to try to follow that with a pair of BJTs.

Essentially an active circuit that sets the DC quiescent current. Since temperature will make that drift away it needs a regular quiet interval where the DC bias circuit measures the quiescent current and adjusts itself. That would be the servo part. But Fred is right, DC can only be measured while in full operation in a class A amplifier and this (or shuold become) is class AB2. So you'd have to briefly stop the microscope scan to adjust the DC bias.

--
Regards, Joerg

http://www.analogconsultants.com/
Reply to
Joerg

[...]

Oui, j'ai eu tort. Was thinking of class A but this is class AB2 (or should be). So that only leaves the option to regularly stop the microscope scan. Probably not too bad since temperature drifts are slow.

Other options might be to gauge the DC from the input signal and bick a low amplitude phase but that gets esoteric.

--
Regards, Joerg

http://www.analogconsultants.com/
Reply to
Joerg

One sad trend is that with the demise of the CRT the nice video driver transistors also died away. Those would have been very useful in a project like Adrian's.

--
Regards, Joerg

http://www.analogconsultants.com/
Reply to
Joerg

It is a good idea but you have to make sure the capacitance to ground in those isolated supplies is very minimal. Also, the slew rate in the input signal must be limited because if the opamp-FET combos can't follow fast enough, else ... PHUT ... *POP*

You could diode-clamp around the opamp to avoid excursions that would exceed the abs max limits on its input. That should fix the startup blow-outs and input pulse racing.

--
Regards, Joerg

http://www.analogconsultants.com/
Reply to
Joerg

I've got a couple pulls sitting around here, like the 20V 100mA 1GHz cascode bottom device, or the 120V 100mA 1GHz device that sat atop it! Almost always Sanyo parts, lovely specs.

Tim

--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
Reply to
Tim Williams

Probably all obsolete or "Not for new designs" :-(

But for Adrian that wouldn't matter since he only has to build one unit.

--
Regards, Joerg

http://www.analogconsultants.com/
Reply to
Joerg

This deserves simulation with good part models. When one side swings up, the opposite-side opamp may want to rail, so it may need some diodes or fancier stuff. Ideally, one would keep some current flowing in both fets all the time.

The opamps should *reduce* the noise of the fets!

That circuit is fun, but maybe this is better:

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The impressive thing about this circuit is that neither fet ever turns off, and the crossover behavior is essentially perfect.

This is a current source, and the piezo is a capacitor, so we have an integrator that is the dominant pole of the control loop. That all works out pretty nicely. This will be super-linear.

U1 needs to be fast and have low quiescent supply current, LT1217 sort of thing. One can add a resistor+pot between the Q1-Q2 emitters to trim fet quiescent bias. +-10 (or whatever) needs to be quiet.

Always design at least one circuit before breakfast.

--

John Larkin                  Highland Technology Inc
www.highlandtechnology.com   jlarkin at highlandtechnology dot com   

Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom timing and laser controllers
Photonics and fiberoptic TTL data links
VME  analog, thermocouple, LVDT, synchro, tachometer
Multichannel arbitrary waveform generators
Reply to
John Larkin

That one may be easier to frequency-compensate if you add a resistor from U1's output to the FET drains. That adds some local feedback that (I believe) bypasses the main frequency compensation of U1. Local feedback will also push the output pole to higher frequency.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

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Reply to
Phil Hobbs

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