Has anyone seen a reason that it has to be tuned up so tightly in the first place?
If the object is to generate a voltage or circulating current of a specified amplitude and phase, it can be accomplished without tuning... just apply some "outside the box" thinking. ...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| San Tan Valley, AZ 85142 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
As I've explained a few times, I am designing a box that simulates a transducer. The transducer has an LC network inside that the customer drives. The easiest way to simulate an LC is to use an LC. My LC has to be similar to the LC in the transducer and the customer spec says so. If the transducer voltage is distorted by the customer's drive, or detuned by cable capacitance, we want ours to be distorted the same amount.
I'll pick off the voltage across my LC, digitize it at about 50 Ms/s and do DSP stuff to it. That means "Digital Signal Processing" for the benefit of you vintage analog types. A wannabe competitor tried to do this all analog, with multipliers and opamps and stuff, and blew the project. So we're the emergency cleanup crew. We don't really want to do this, but a very good customer is in trouble now and asked us, and we can't say no.
We're going to use a microZed board as the compute platform, an FPGA and two 600 MHz ARM cores on one chip. The Xilinx software and support suck, but all FPGA software and support suck these days. After a week of work by two guys, we can now run a C program that can read and write an FPGA register. The uZed demo application *doesn't configure the FPGA*
Tuning the LC is one of the more interesting parts of the project. A lot of the rest is digital grunt work and trig and stuff.
MicroZed:
-- John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom timing and laser controllers Photonics and fiberoptic TTL data links VME analog, thermocouple, LVDT, synchro, tachometer Multichannel arbitrary waveform generators
OK. You're trying to _exactly_ emulate a transducer, thus the required tuning accuracy?
Is the customer's transducer inductance dead-on spec, or does it have the same kind of tolerancing as your emulation? ...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| San Tan Valley, AZ 85142 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
finally a sure and guarantee way to learn the secrets of LCD Monitor repair . Do you know that understanding of how each sections in LCD Monitor work i s the key of success in LCD Monitor troubleshooting? Yes, if you ignore thi s facts, then chances for you to successfully repaired a LCD Monitor will b e very slim
Don't know. We have a spec that gives us the nominal L and C values, the nominal DCR in the L, and a 2% tolerance on the resonant frequency. We're not allowed to know the exact nature of the transducer... it's a secret for some reason. I don't expect that abstract discussion of tuning LC networks will put me in jail or anything.
All I want to do is tune an LC network in a range where varicaps can't reach. I'd buy a tunable inductor, pot core maybe, if anybody sold one assembled and ready to go.
-- John Larkin Highland Technology, Inc jlarkin at highlandtechnology dot com http://www.highlandtechnology.com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom laser drivers and controllers Photonics and fiberoptic TTL data links VME thermocouple, LVDT, synchro acquisition and simulation
Maybe a motorized slug adjuster ?:-) ...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| San Tan Valley, AZ 85142 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
-- Just for the record, what are the nominal values and what are the tolerances on them?
L is maybe 82 uH, C around 27 nF.
-- John Larkin Highland Technology, Inc jlarkin at highlandtechnology dot com http://www.highlandtechnology.com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom laser drivers and controllers Photonics and fiberoptic TTL data links VME thermocouple, LVDT, synchro acquisition and simulation
te:
nd has done so for years. The parts are still stocked by some broad line distributors, including Newark and Farnell. I've posted part numbers in thi s thread.
first place?
cified amplitude and phase, it can be accomplished without tuning... just a pply some "outside the box" thinking.
ansducer.The transducer has an LC network inside that the customer drives. The easiest way to simulate an LC is to use an LC. My LC has to be similar to the LC in the transducer and the customer spec says so. If the transduce r voltage is distorted by the customer's drive, or detuned by cable capacit ance, we want ours to be distorted the same amount.
d do DSP stuff to it. That means "Digital Signal Processing" for the benefi t of you vintage analog types. A wannabe competitor tried to do this all an alog, with multipliers and opamps and stuff, and blew the project. So we're the emerge ncy cleanup crew. We don't really want to do this, but a very good customer is introuble now and asked us, and we can't say no.
d two 600 MHz ARM cores on one chip. The Xilinx software and support suck, but all FPGA software and support suck these days. After a week of work by two guys, we can now run a C program that can read and write an FPGA regist er. The uZed demo application *doesn't configure the FPGA*
t of the rest is digital grunt work and trig and stuff.
required tuning accuracy
e same kind of tolerancing as your emulation?
the nominal DCR in the L, and a 2% tolerance on the resonant frequency. We' re not allowed to know the exact nature of the transducer... it's a secret for some reason. I don't expect that abstract discussion of tuning LC net works will put me in jail or anything.
ach. I'd buy a tunable inductor, pot core maybe, if anybody sold one assemb led and ready to go.
If you'd bought the EPCOS P26x16 pot cores, coil formers and adjusters when I first gave you the part numbers, you'd have working coil by now.
The 100nH+/-3% per turn squared cores that you can buy off the shelf from D igikey need 27 turns of wire to get close enough to 77uH (73uH +/-3%) witho ut the adjuster that you can be pretty sure that the adjuster can bring it up to 77uH.
You can wind that coil by hand. Buying the P26x16 coil former makes it easy . You've spent more time speculating about half-baked trimming schemes than you would have spent on putting a practical solution together and testing it.
-- Bill Sloman, Sydney
-- Thanks. And DCR?
Hey, think about this:
You could have a dip switch and a row of caps, to make a sort of capacitive DAC. The obvious way would to have the smallest cap, the one on the right, be small enough to give the required frequency-set resolution. Caps to the left are successively 2c, 4c, etc, as many as needed to get the total C that you'd ever need.
But if the switches are weighed 2:1 (the most efficient pattern) the tolerances get tighter and tighter as you go left, in order to have monotonic progression and "no missing codes." If you have 8 switches, the worst transition is from
0x7F to 0x80, and that requires the biggest cap to be better than 1% accurate, or else the step can be ugly and there may be some frequency you can't hit.So, why not make the cap ratio something like 1.8:1 instead of 2:1, and use 10% caps, or any standard values with a 1.8 ratio or less? You'd still use the simple "successive approximation" algorithm to set them.
In my situation, the final switch pattern doesn't mean anything; it's write-only. In an SAR ADC, the final switch pattern is the binary data, so you have to know what it means. If you knew all the actual cap values, even if they were goofy, the pattern would tell you the actual total C value. One could translate that pattern to a correct binary code (with fewer bits) with a custom-programmed lookup table.
I wonder if any SAR ADCs actually work that way: a capacitive DAC with less than
2:1 ratios, and a lookup table.I can solve my tuning problem with a 6 or 8 position dip switch and 6 or 8 cheap
5% caps. Just gotta give up assuming that a DAC-type system needs 2:1 ratio elements.-- John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom timing and laser controllers Photonics and fiberoptic TTL data links VME analog, thermocouple, LVDT, synchro, tachometer Multichannel arbitrary waveform generators
Or you could think outside the box... relax... think school boy level... it's really easy... IF you don't try to act like a PhD >:-} ...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| San Tan Valley, AZ 85142 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
You never actually say anything. You're not worth responding to.
-- John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom timing and laser controllers Photonics and fiberoptic TTL data links VME analog, thermocouple, LVDT, synchro, tachometer Multichannel arbitrary waveform generators
Hee! Hee! I just love getting your goat! Proof of concept tomorrow
At MIT they taught us to think _fundamentals_. In your NOLA trash school they taught you to do cut-and-paste. ...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| San Tan Valley, AZ 85142 Skype: Contacts Only | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
-- Then why didn't you use Sloman's suggestion?
-- Oh, yeah? Let's see some numbers...
On a sunny day (Wed, 20 Nov 2013 12:52:31 -0800) it happened John Larkin wrote in :
It all seems strange to me. In the VLF transmitter design I referred to I wound every coil as potcore myself. There were about maybe a hundred, all in a 19 inch rack spread over 12 modules. Some were adjustable (some bandfilters), all had expensive precision caps (1%) and some HV caps. Winding a tunable potcore for that size of L only takes minutes,. On top of that I had to document every freaking coil and component to get it approved, including the calculations for those components (like the band filters).
A few weeks ago, mm actually years ago, I started looking for a decent air speed meter that had low weight so drones could still take off, airspeed essential as GPS ground speed says nothing with a few km/h tail wind if you do not want to fall out of the sky occasionally.
There were a few interesting ones, one of those is the thermal anemometer, the other one is acoustic ultrasonic time of flight based.
I have not decided yet, but both have had my attention now for a while, the acoustic one because I did some previous Doppler work with that. And there is the more interesting math where you need to read the sensor. Some simple (or not so simple) examples: Acoustic:
This is what has been in my 'research before design' map for a while. I think these are very nice links. You mentioned analog failed, and now going digital. I would not want to to the acoustic one in analog, really.
Have fun:-)
PS These transducers cannot normally be modeled 'spiced so to speak' as such a simple LC (with R), as even that changes with temperature and air speed, acceleration, basically any load.
Sure, doesn't even need a lookup table. The successive-approximation algorithm will even work--start with all switches open, and try closing them from MSB to LSB while never going below the nominal resonance.
The nulling method works with any decreasing sequence. Figuring out what capacitance was added is what needs the lookup table, but you don't care for this application.
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 USA +1 845 480 2058 hobbs at electrooptical dot net http://electrooptical.net
Isn't the problem there that you have to know all the values... each incarnation is different? But maybe you have a way to do that.
I don't know much (read as anything) about DAC's. But if you had some feedback, then you could add in some 'extra' LSB caps that could be switched in when/if needed. (Of course that means more switches.)
George H.
100 56 33 18 10 5.6 3.3 1.8
-- John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom timing and laser controllers Photonics and fiberoptic TTL data links VME analog, thermocouple, LVDT, synchro, tachometer Multichannel arbitrary waveform generators
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