Hello,
We have a circuit that generates signals with an extremely slow rise/fall time (milliseconds). This circuit should feed a digital IO sampler that has a CMOS input (AHCT245/645...), and it's known that slow rise/fall times are bad for CMOSes (forcing them to spend long time in a conducting state, thus generating power and heat that may cause damage).
The common solution for this problem is placing a shcmidt trigger (74VHC14) on the circuit's output, to feed a fast signal to the CMOS.
However, one engineer presented the following appnote: "Implications of Slow or Floating CMOS Inputs"
What is your opinion ? It's an important subject that surely raises in many designs.
Eli