Standard Cell Vs FPGA designs

Now that sounds kinda like some sort of wacko exam question...

I think you should have a re-think.

Dave.

I think you're nuts, but you can ignore history at your peril.

Dave..You are smart..It was an exam question. But I am not convinced by the answer professor gave me...that FPGAs will takeover standard cell designs thereby reducing the number of standard cell designs. I think as the performance and power of FPGAs will be bad compared to SC designs, SC designs are always going to be winners and I dont think FPGAs will take over.

You didn't answer Dave.

FPGAs won't "take over" standard cell designs any more than digital esigns will "take over" analog designs or microcontrollers will "take over" logic designs. Each has its purpose and the lines will shift.

Standard cells will certainly continue to lose designs to FPGAs as costs rise. There will continue to be a niche for standard cell, as well as custom logic, for those applications that can afford the costs (where "afford" =3D=3D require).

Your professor, wsa right, but he had the wrong reason.

In electronics design, there are critical 2 speed measurements.

1. How fast will your circuit operate?
2. When will you be finished with the design?

FPGA circuits are easier to design, require less training, and (at least in my experience) require less expensive tools. Your typical MB- bearing middle manager realizes that he is more likely to get a bonus for finishing his project ahead of schedule and within budget than for producing a high-quality product. Thus the enthusiasm for FPGAs.

Neither.

The ever-increasing costs of mask sets for any kind of custom chip and the ever-increasing cost of getting decent cost and performance out of FPGAs will lead to more hybrid pattern-able custom chips: SoCs with hard-coded processor / DSP / memory / standard peripheral cores but with final metal mask(s)- or fuse- or flash- programmable logic cell and/or analog array areas for specific applications. Vendors that cover as much application / volume space as possible with the least investment and best service (models, tool chains, prototype turnaround, application support, etc.) will be the big winners (as in every other generational transition of semi-custom silicon product). Think Microchip (or higher-order) with FPGA and/or programmable analog blocks.

-- Silvar Beitel

Frankly, I think this sounds suspiciously like a homework question.

Good Luck! Rich

PA

ldesigns thereby reducing the number ofstandard celldesigns. I

Keith, I agree that Standard Cells will continue to lose designs to FPGA as FPGA costs keeps coming down and can hold bigger designs in them. But, won't the performance/power requirements becomes more and more stringent when we move into future ? Excuse me for using the term "take over", displace would be more appropriate.

Jean

The problem is that it isn't defined exactly what "take over" here means. You and the professor are both right -- FPGAs are definitely replacing what would have previously been standard cell designers more and more every year, but in some applications power and performance (or at least performance per dollar) are critical and FPGAs are unlikely to be competitive -- ever: Such designs will not be "taken over."

What kind of professor puts, "Do you believe..." questions on an engineering exam anyway? He might as well have asked you if you believe in anthropomorphic global warming or the tooth fairy.

What's the difference between an "FPGA" and a "standard cell", other than my (more than likely inaccurate) assumption that an FPGA is simply a collection of interconnectible standard cells?

I have no doubt someone here will correct me if I'm inaccurate, misinformed, or am making a WAG and missing the point entirely. ;-)

Cheers! Rich

FGPA

rd

elldesigns thereby reducing the number ofstandard celldesigns. I

FPGA costs coming down isn't nearly as important as their performance going up and cost of standard cell designs. Yes, there will always be niches for standard cells, though increasingly small. The number of these applications will be bounded by the astronomical costs involved. Because the costs can be spread around more ASSPs will be far more prevalent, further eroding the ASIC market.

BTW, not all FPGAs are Xilinx' power hogs. ;-)

Anthropogenic, not anthropomorphic.

Well, you aren't exactly wrong, but the point of FPGA's over standard cells is that FPGA's are reconfigurable off-the-shelf devices and require no NRE. Standard cell is basically a full ASIC with the associated NRE.

Dave.

--------------------------------------------- Check out my Electronics Engineering Video Blog & Podcast:

It's very hard to quantify this stuff. Do you base the figures on actual shipped chip quantity?, number of design implemented? etc. Standard cell ASIC's require a massive NRE investment, and this effectively puts a cap on the number of customers who can afford to design ASIC's. If you base the argument on number of people implementing new designs, then FPGA's will win hands down, as even Joe Blog Hobbyist can implement FPGA's. If you look at the EDA market, then ASIC customers are getting fewer and fewer (like down to a number you can start to count on your hands), but FPGA tool use has been exploding in numbers for a long time. So in that respect your professor is right.

But there will always be a big niche for custom ASIC's, the market won't vanish.

Dave.

--------------------------------------------- Check out my Electronics Engineering Video Blog & Podcast:

Cost-conscious digital can't help but go to some form of array-based...

And analog/mixed-signal ASIC's will continue... which is why I continue to get requests.

...Jim Thompson

There is no 'FP' in an ASIC and FPGAs aren't 'AS'.

Sometimes cost isn't the driving issue. Sometimes the line gets drawn in different places.

There is real money to be made in niches. One could argue that that

You're already seeing that, though DSPs not so much. Everyone has soft core and hard core processors of various stripes depending on needs. RAM/ROM in single and dual ports have been everywhere for a decade. User flash is available on several models. The FPGA fabric just begs to do the DSP type work so I don't see too much there. Peripherals, except for ubiquitous things like USB, won't find their way into hard macros either. Hardware accelerators, such as DDR, QDR, and other SerDes interfaces already have.

They might be the "winners" but there will be many. The real money is in the niches. 'X', 'A', and 'a' have a *pile* of money tied up in the things you cite.

If it is, there is nothing to be learned at that school.