Spice Model for OpAmp Output Stage

Nice!

Tim

-- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website:

"Jim Thompson" wrote in message news: snipped-for-privacy@4ax.com...

Thanks! I'll be posting the model as soon as I make sure no bugs lurk in the wings ;-) ...Jim Thompson

-- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at

JU$TICE HA$ BEEN $SERVED, MY A$$

"Jim Thompson" wrote in message news: snipped-for-privacy@4ax.com...

Speaking of models -- I booted up your "behavioral logic" model last night, but it crawls slow as molasses, even just for one gate. And makes divide-by-zero errors around feedback networks (like a simple 2 x NOR R-S f/f). Cranking the sim settings as detailed as I dare go, I find the output risetime is under 200ps (over, at most, three time steps)... what the heck?

I realize it's unfinished, but gee, I thought your analog models were famously continuous... :^)

FYI.

Tim

Those are the old way... note the dates... I have better ways now... I'm always improving my modeling >:-}

(Don't use the FUNC_... versions; and set "TP" to a rational value.))

"crawls slow as molasses" sounds like you are using LTspice which is famously convergence cantankerous on models that scream elsewhere.

Try "Alternate Solver" plus add "startup" to your .TRAN statement... may help, may not.

On an R-S flop you may also need to force an pintail state. ...Jim Thompson

Spell checkers :-( should be "initial" ^^^^^^^ ...Jim Thompson

So, use only the application Thompson uses? I thought LTSpice was pretty much the defacto standard.

Not worth the effort to learn if "may help" is successful.

Goody! Another setup requirement.

My spell checker is not brain-dead like yours. I couldn't find a way to come up with pintail by misspelling initial.

"Jim Thompson" wrote in message news: snipped-for-privacy@4ax.com...

Well, I can't /not/ use them, as the B_INPUT_... versions are just pin conditioning. (Which does go faster, but doesn't do anything beyond sharpen the input. And really, still doesn't go fast enough to be useful in a modest sized circuit.)

Worse... Altium. :-P But unless PSPICE has diverged significantly from 3F5 and XSPICE in its solver, it shouldn't be very different.

Tried everything from TRAP to GEAR 6. RELTOL up to 0.01 (ack), other things looser, RSHUNT and GMIN up and down (not that I would expect those to make a difference here), no breakthroughs.

Only thing that helped startup was supply ramping, but the rest of the sim takes seconds per edge (admittedly, on my slow machine, and the solver is single core besides).

And like I said, the risetime is undefined, seemingly being as short as possible.

Do you have those TANH's wired in a feedback circuit? It's perfectly possible to start with continuous, nonlinear functions and end up with discontinuous functions...

The lack of time dependency is a big problem, physically speaking. Can you jam a capacitor into that loop, or something?

I'll take a closer look and see if that's what's going on...

Related: is it possible Altium's PSPICE syntax isn't in the right order, and feedback is positive somewhere?

Normally, you'd use B sources and V={...} or I={...} expressions, whereas you've got E VALUE {...} or G VALUE {...} sources (as is traditional for PSPICE).

Tim

You must be doing something terribly wrong.

How do you do that ?>:-}

Duh! There is a capacitor there.

I have no experience with Altium. So I have no way to diagnose the speed issues.

Most every simulator recognizes PSpice syntax... even TopSpice >:-}

I have D-flops simulating here... simulating about as fast as you can blink. ...Jim Thompson

"Jim Thompson" wrote in message news: snipped-for-privacy@4ax.com...

Trying it again, in a vintage (yet more numerically accurate..) simulator, I get this:

Only thing special I'm doing is setting TRTOL=1 and RELTOL=0.1m.

The delay is off *really* far, too. The input delay drivers seem suspiciously weak (input time 10nA?), but the capacitor is ridiculously small too (~fF!). Is there something about PSPICE scaling G VALUE statements???

Tim

Tells me nothing, post netlist, circuit (.CIR) files (as appropriate) and library file you used for inverter. ...Jim Thompson

"Jim Thompson" wrote in message news: snipped-for-privacy@4ax.com...

Here's the copypasta from Multisim:

• NI Multisim to SPICE Netlist Export
• Generated by: williamstm
• Fri, Jul 08, 2016 10:23:30

*## Multisim Instrument XSC1 ##*

*## Multisim Component V1 ##* vV1 2 0 ac 1 0

• distof1 0 0
• distof2 0 0
• pulse(-1 2 1e-006 1e-007 1e-007 1e-005 2e-005)

*## Multisim Component IC1 ##* xIC1 2 1 0 FUNC_INV__DEFAULT__1

In Message-ID: I said....

"Those are the old way... note the dates... I have better ways now... I'm always improving my modeling >:-}

(Don't use the FUNC_... versions; and set "TP" to a rational value.))"

Here is B_INPUT_INV run in both PSpice and LTspice...

PSpice runtime: 0.05sec

LTspice runtime: 0.02sec

Let me know when you get it right >:-} ...Jim Thompson

"Jim Thompson" wrote in message news: snipped-for-privacy@4ax.com...

Doi, the INV is only an example. INV doesn't do s*it, I want NAND/NOR/etc.

Let me know when you get those right.

Tim

I do my best to assist amateurs in understanding Analog Circuit Design and Spice Modeling, but when they're totally incompetent, and snarky to boot, I am under no obligation to continue.

The parts exist....