Special Holding DAC

How about one FPGA with 100 PWM outputs?

Best regards, Spehro Pefhany

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Bobby Joe schrieb:

Hello,

look here:

Select multiple DACs, enter a 8 under # DAC Outputs, click on Update Results and you see DACs with 8, 12, 16, 32 and even 40 Outputs. The 100 outputs may be done using 3 to 4 ICs.

Bye

"The Journey is the reward"

eff.com

A little bit more complex than I need and I'd rather avoid using PWM. I'd like to use I2C or SPI and have a more distributed layout. I believe simple serial comm. DAC's will do the job such as the

I'll need a bit more number of outputs but because it uses serial comm it must store the input in a register which takes care of the refreshing. No PWM is needed an I can change the ouput at will. I'm having some issues with TI's site so I haven't been able to look at for their components very well.

ters/i...

Thanks, It seems that all I need is a serial comm. DAC. It will take care of storing the input in a register so I don't have to continuously update.

Bobby Joe schrieb:

Hello,

this one

has a parallel and a serial interface, you may use the interface which is the best for your problem.

Bye

"Bobby Joe" kirjoitti viestissä: snipped-for-privacy@o10g2000vbg.googlegroups.com...

Rohm makes BU2506FV and BU2505FV serial SPI 10-bit R-2R DAC with 8 and 10 outputs Available from Digikey and I think they were quite cheap as I have even saved the datasheet on my computer.

-ek

That's an option. Or a uC with a dozen 8-bit cheap ser-par logic chips. But that needs 100 lowpasses.

8-ch DACs aren't that expensive anymore these days.

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All the DACs that I know hold the last-written value until you next update them, or shut down power. If you need the value held through power-down, search on "EEPot".

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Bobby Joe schrieb:

Hello,

it is not necessary to use DACs with a serial interface, there are also DACs with a parallel interface which include a holding register for each DAC output of the IC. I don't know if there are multiple DACs within one IC without holding registers, I think holding registers are necessary in this case to enable a broad field of applications for an IC with multiple DACs.

Bye

Yeah, I see that now. For some reason I thought you would eventually have to update the DAC or would have to write all the channels at the same time. At least for serial comm. It seems they all can be controlled independently and written when ever.

So it seems just about any DAC and ADC will do for me! Which is good news!

I do not want a parallel interface because I do not need the speed and would like to conserve space on the board. I think now all DAC's work by pretty much using one register per channel and as long as each channel can be updated independently then it should be fine. I've cascaded some other IC's using SPI and had to write to them all and for each update of an IC I had to update them all. Hence I had to keep a memory of all the IC's so I could just update one without the rest. I want to avoid that with cascading DAC's and ADC's. I sorta want random access to a cascade of IC's. I think SPI will not allow that because it serializes all the registers unless I loop the final output back into the input of the first.