sine wave generator

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did

the

chips. And

Incwww.highlandtechnology.com jlarkin at highlandtechnology dot com

could

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like the

Incwww.highlandtechnology.com  jlarkin at highlandtechnology dot com

The fundamental component of the Wein bridge oscillator seems to be the trimpot.

--

John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom timing and laser controllers 
Photonics and fiberoptic TTL data links 
VME  analog, thermocouple, LVDT, synchro, tachometer 
Multichannel arbitrary waveform generators
Reply to
John Larkin
Loading thread data ...

Or better yet, the lightbulb.

Tim

--
Deep Friar: a very philosophical monk. 
Website: http://www.seventransistorlabs.com/
Reply to
Tim Williams

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What you are trying to do sounds *very* much like what was done in the Kansas city interface for cassettes back in the old days - even down to the 1200/2400 Hz switching.

I'd be looking at a 4018 ring counter to generate the sine wave (7th harmonic is the first and down about 15 db + a simple third order filter at 2400 Hz to get better than 36db suppression. If you broke your rule and used a pic (easy to program with free hobby type BASIC's - or get someone to provide them already done) you would get frequency accuracy to 1% with no set up.

A bit more work would get you a complete 300 baud modem - but you don't want that.

Reply to
David Eather

Amusing myself, and relishing putting Slowman into a catatonic fit because I used a 555 timer, I submit this...

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It's been around 1985 since I last designed the modems for the OmniComp/GenRad PSP Portable Tester.

If I recall correctly, data changes only occurred at the peak of the sine wave to avoid a slope discontinuity, so I've implemented that, as shown... sort of my own crude UART :-)

If you clip the triangle wave at 2/3 as I previously posted, data changes will occur during that flat portion... and the 3rd harmonic will be way down.

Apply a very simple low-pass and it should look pretty sinusoidal. ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     | 
| Analog Innovations, Inc.                         |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| Phoenix, Arizona  85048    Skype: Contacts Only  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
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I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

Geez, what a mess.

--

John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom timing and laser controllers 
Photonics and fiberoptic TTL data links 
VME  analog, thermocouple, LVDT, synchro, tachometer 
Multichannel arbitrary waveform generators
Reply to
John Larkin

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rimpot.

.highlandtechnology.com  jlarkin at highlandtechnology dot com

No trim pot needed.

The amplitude is set by the diodes, (an resistor ratio) so there will be some temperature dependence.

George H.

Reply to
George Herold

Decent. The 202 frequency stability requirement would be my concern, but we used to do it with XR2206's, so it couldn't be that tight.

You could improve the sine by breakpointing the integrator. (You don't need it--just for fun).

--
Cheers, 
James Arthur
Reply to
dagmargoodboat

two

below the

power did

to

do the

chips. And

Incwww.highlandtechnology.com jlarkin at highlandtechnology dot com

could

fiddling.

away

modem is

like the

no

the

Incwww.highlandtechnology.com jlarkin at highlandtechnology dot com

trimpot.

Incwww.highlandtechnology.com  jlarkin at highlandtechnology dot com

If the gain goes down a little, it quits. Up a little, it distorts. I don't know how it will behave if you FSK it, but I bet it ain't pretty.

--

John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom timing and laser controllers 
Photonics and fiberoptic TTL data links 
VME  analog, thermocouple, LVDT, synchro, tachometer 
Multichannel arbitrary waveform generators
Reply to
John Larkin

I played with it a little. Pretty decent. My break-pointing didn't improve it.

James

Reply to
dagmargoodboat

This is a tad better.

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Fun to play with, up to a point.

It would be cool if I could tell LT Spice to fiddle with two or three resistor values, searching for the lowest THD or something. Rob knows how to wrap optimizations around simulations; I mostly fiddle from instinct.

--

John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom timing and laser controllers 
Photonics and fiberoptic TTL data links 
VME  analog, thermocouple, LVDT, synchro, tachometer 
Multichannel arbitrary waveform generators
Reply to
John Larkin

Or a small FPGA which can be both low cost and low power, iCE40 from Lattice. My only issue with this approach is the packaging. Lattice doesn't provide FPGAs in what I call low pin count, user friendly packages (nor does any other FPGA maker). But then they are trying to make a profit, not service what would seem to be a niche market.

But if you need a few dozen pins, these parts can run with any of the small micros on power and cost.

Rick

Reply to
rickman

Altera's MAX CPLDs (really small FPGAs) come in some pretty friendly packages.

Reply to
krw

istor

The shaper basically breakpoints the waveform into three slope areas, plus exponential diode mush to radius the curves.

To improve on that, I clipped off the triangle tips with a single r-r buffer amp, about 5% clipped--that gives a perfect flat sine tops. Looks gorgeous. But, the r-r amp (LTC6255) swing's slightly asymmetrical, so the shaping is too, degrading the FFT.

So, I tried Jim's tip, clipping 1/3rd straight off the triangle waveform, FFT'd that all by itself, and it's better than all of our previous attempts, no shaper.

.-----[3k]----. | | | |\ +5 | | | \| |

| >------+----> / \ / .--|+ / LTC6255 _/ \_/ | | /| === |/-5v

2nd: -39dB 3rd: -37dB 4th: -30dB 5th: -38dB
--
Cheers, 
James
Reply to
dagmargoodboat

It's nice to be able to prototype with a DIP package.. Microchip has been pretty good with that.. they're probably the only source for a

32-bit micro in a DIP package (0.3" 28-pin package). No problems prototyping a 64MHz processor in a solderless breadboard or haywired protoboard-- the hard stuff is all on-chip.

Sadly (or not), you typically have to make a board or use an eval board with most new chips these days.

Most FPGAs seem pretty needy- multiple power supplies, expensive external configuration memory etc. and limited analog functionality. (I think only Actel has flash FPGAs). I like the flash CPLDs, but I'm not sure you could get a good sine generator into one of them. Maybe take a digital oscillator approach that does not require a sine table.

Best regards, Spehro Pefhany

--
"it's the network..."                          "The Journey is the reward" 
speff@interlog.com             Info for manufacturers: http://www.trexon.com 
Embedded software/hardware/analog  Info for designers:  http://www.speff.com
Reply to
Spehro Pefhany

Yeah, but they aren't so low power, at least last time I looked. Altera has never worked too hard for the low power market.

Rick

Reply to
rickman

That's not my concern. I don't mind working with QFPs and such. I don't like the fine pitch BGAs that require very fine line width and very small inter-ball vias. I like to use very low cost prototyping services that don't do all the small feature sizes.

Take a look at the iCE40 line from Lattice. If you are working on serious low power you will be using very low voltage I/Os and so won't need "multiple" power supplies. I don't work with external configuration memory, only stuff with internal flash or at least NV storage. The XP, XP2 and XO2 are all internal flash. The iCE40 has one time programmable memory, but is still RAM based so you don't need to use the NV RAM until you are ready to ship.

But I do need to keep in mind on my current project that if I want to update the unit, it will need an inexpensive external data Flash.

As to analog, every digital device can do analog out, that's relatively easy. Analog in is not too hard either in an FPGA. I'll be using a one bit input from the LVDS comparator. Internally it will be processed to get over 30 dB of SNR gain. It's all in what you are trying to do.

Rick

Reply to
rickman

Mouser has a DIP Proprller chip from Parallax and an ARM from NXP

--
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Reply to
Jasen Betts

Not a Propeller-head, but the 50MHz ARM in a DIP-28 (albeit 0.6") is a good find: LPC1114FN28/102,12 Only a couple bucks in small quantities.

Single pin for programming/debug interface, and a serial bootloader in ROM if you manage to brick it.

Best regards, Spehro Pefhany

--
"it's the network..."                          "The Journey is the reward" 
speff@interlog.com             Info for manufacturers: http://www.trexon.com 
Embedded software/hardware/analog  Info for designers:  http://www.speff.com
Reply to
Spehro Pefhany

Change of subject noted. They are pretty low, but hell, FPGAs are not power sippers. If you're that constrained an no FPGA is the right solution.

Reply to
krw

And

yeah, square wave would probably work for this problem especially if it can be synchronised to the data clock

Or perhaps spit Don Lancasters's "magic sine" pattern out the chip's SPI

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Reply to
Jasen Betts

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