sine wave generator

John Larkin · 2012-12-19T23:38:50+00:00

It's pretty easy to make a sorta decent sine wave generator. I can switch R1 with an HC analog mux to make FSK. Three resistors and two dual diodes bend the triangle into a sine. R6 makes the sine look a little nicer, but doesn't affect the FFT much, so I could leave it out. The 3rd harmonic is about -26 dBc either way. The values are very un-scientifically fiddled. Version 4 SHEET 1 1180 680 WIRE 528 32 224 32 WIRE 672 32 528 32 WIRE 720 32 672 32 WIRE 816 32 720 32 WIRE 976 32 896 32 WIRE 1024 32 976 32 WIRE 1056 32 1024 32 WIRE 224 48 224 32 WIRE 528 64 528 32 WIRE 976 80 976 32 WIRE 352 112 320 112 WIRE 368 112 352 112 WIRE 640 112 608 112 WIRE 656 112 640 112 WIRE 320 144 320 112 WIRE 288 160 144 160 WIRE 608 160 608 112 WIRE 400 176 352 176 WIRE 432 176 400 176 WIRE 528 176 528 128 WIRE 528 176 512 176 WIRE 576 176 528 176 WIRE 144 192 144 160 WIRE 224 192 224 128 WIRE 288 192 224 192 WIRE 720 192 720 32 WIRE 720 192 640 192 WIRE 976 192 976 160 WIRE 976 192 912 192 WIRE 1056 192 976 192 WIRE 576 208 528 208 WIRE 320 240 320 208 WIRE 352 240 320 240 WIRE 368 240 352 240 WIRE 608 240 608 224 WIRE 656 240 608 240 WIRE 672 240 656 240 WIRE 912 240 912 192 WIRE 1056 240 1056 192 WIRE 528 256 528 208 WIRE -320 288 -352 288 WIRE -288 288 -320 288 WIRE -112 288 -160 288 WIRE -80 288 -112 288 WIRE 64 304 16 304 WIRE 112 304 64 304 WIRE 224 304 224 192 WIRE 224 304 192 304 WIRE 272 304 224 304 WIRE 400 304 400 176 WIRE 400 304 352 304 WIRE -352 336 -352 288 WIRE -160 336 -160 288 WIRE 16 336 16 304 WIRE 912 352 912 304 WIRE 912 352 752 352 WIRE 1056 352 1056 304 WIRE 1056 352 912 352 WIRE 752 384 752 352 WIRE 912 400 912 352 WIRE 1056 400 1056 352 WIRE -352 448 -352 416 WIRE -160 448 -160 416 WIRE 16 448 16 416 WIRE 752 512 752 464 WIRE 912 512 912 464 WIRE 1056 512 1056 464 FLAG -352 448 0 FLAG -160 448 0 FLAG -320 288 +5 FLAG -112 288 -5 FLAG 528 256 0 FLAG 352 112 +5 FLAG 640 112 +5 FLAG 352 240 -5 FLAG 656 240 -5 FLAG 16 448 0 FLAG 672 32 OUT FLAG 144 192 0 FLAG...

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rickman 13 years ago

That's not true anymore. There were CPLDs from a couple of sources that were "zero power", more accurately uA levels, but they are CPLDs, not FPGAs. The iCE40 FPGA series from Lattice (they bought SiBlue) is in that same power range with double digit quiescent uA current levels and still rather low currents with MHz clock rates. They spec their parts filled with 16 bit counters which average about 2 bits flipping per clock edge. So at a 1:8 duty cycle on average and clocked at 32 MHz, the 1 kLUT part only draws 3 mA at 1.2 volts. That's why I say they can be competitive with MCUs in many apps now.

Xilinx and Altera aren't the only companies making FPGAs. They seem to have very little interest in low cost or low power devices. I expect they have done a lot of marketing surveys and concluded that this is not where the money is. It will be interesting to see how this part of the market develops. I think it will become more and more important as more emphasis appears on mobile devices. The iCE40 devices are directly targeted to high volume and very low power apps. I believe I read something the other day about them shipping 1 million iCE parts or something similar. Anyone else read this?

Rick

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Spehro Pefhany 13 years ago

The Xilinx CoolRunner CPLDs are low power (like 10 or 20uA Iq), and pretty reasonably priced.

Best regards, Spehro Pefhany

"it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com

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krw 13 years ago

Define "low power" and "low cost".

I've found that the real cost of FPGAs was directly proportional to how tied you are to their architecture, and inversely proportional to how badly the manufacturer wanted to do business with you. The book prices mean absolutely nothing and quantities are only a secondary consideration. It really is an odd business.

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John Larkin 13 years ago

We've recently got distributor pricing on one Altera part at $800, and another quote at $140.

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dagmargoodboat 13 years ago

I'm still impressed by the truncated triangle wave. Harmonics are surprisingly low, it only takes one op-amp, eliminates a lot of discretes, and has no difficulties with tolerance, stability, etc.

.-----[3k]----. | | | |\ +5 |

2.5Vpp | | \| | /\/\/ >--[1k]--+--|- \ | __ | >------+----> / \ / .--|+ / LTC6255 _/ \__/ | | /| === |/-5v 2nd: -39dB 3rd: -37dB 4th: -30dB 5th: -38dB

Cheers, James Arthur

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John Larkin 13 years ago

OK, but make sure that the opamp actually rails clean and recovers fast enough.

I still want a sine wave!

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Jim Thompson 13 years ago

No magic involved. Just run the Fourier (by hand :-) of that truncated triangle and you'll see why it works. ...Jim Thompson

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bitrex 13 years ago

At what phase angle does the triangle wave clip? Maybe I'm missing something, but with a gain of 3 should a 2.5Vpp triangle wave clip a rail to rail op amp on +/-5?

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John S 13 years ago

It shouldn't and in my simulator, it doesn't.

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Jim Thompson 13 years ago

Ye, I think a little mis-annotation there ;-) ...Jim Thompson

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bitrex 13 years ago

So, assuming for argument's sake that if the triangle wave coming out of the op amp would be 1 volt, at what voltage level do you clip it? To do the Fourier analysis you have to break the integral into 3 parts, and I'm betting not all clipping amplitudes are created equal. Is it right at the midpoint, like so:

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Or are we to determine that as well?

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Jim Thompson 13 years ago

1V Peak, 2V P-P Triangle. Clipped at +0.667V and -0.667V

I used to know a method, I think attributed to Heaviside, that gave a really easy way to Fourier waveforms made up of line segments. I remember some of it, but not all. I'm searching my notes ;-) ...Jim Thompson

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rickman 13 years ago

I think "low power" is self evident. The iCE40 line has no comparison in the power arena. The only other remotely similar device I know of is a part from Actel that has a very low "sleep" power level. They don't talk about its active power level. The iCE40 devices have specs on power and you can get a power estimate from the design software once you have a design to estimate.

I won't comment on "low cost". I know the prices are variable to win sockets; that is true for all FPGAs including the iCE40 parts. But there is always some relationship to the book price since they all are based on the actual manufacturing cost of the parts.

Do you understand my point? The iCE40 devices are opening a new market for FPGAs that Xilinx and Altera can't currently fill. I think it will be interesting to see how this plays out. I think it will be similar to the tablet/smart phone vs the PC battle going on. The market for conventional FPGAs is much higher dollar at the moment, but the market for low power, mobile apps is huge and will eventually overtake the traditional FPGA markets. The question is just how soon?

It would be nice if you could trim your posts sometimes.

Rick

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Phil Hobbs 13 years ago

At a guess, differentiate the waveform to make it piecewise constant, integrate each piece, add the pieces, and integrate again.

Cheers

Phil Hobbs

Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net

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Jim Thompson 13 years ago

Almost. From vague memory, you differentiate down to impulses, which are located via amplitude and an e^(-j*Omega*tau) term, convert those to sinusoids and you have the transform... used to be lightning quick when I used it regularly ;-) ...Jim Thompson

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John S 13 years ago

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*x+%2B+2

I raised the input voltage to the op-amp until it hit the rails. It became a clipped triangle as described. The harmonics went to hell in a hand basket.

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George Herold 13 years ago

/

Yeah. That looks nice, are those numbers from a soldered (vs simmed) circuit? In 'theory' you should be able to get rid of the even harmonics. So you are just clipping with the supply rails. To get rid of the even's that's either a pot or another opamp. I've read this nice paper on bounding and clamping by B. Pease. All sorts of clever diode bridges, I recall one that used a zener inside a diode bridge (or ring?) that used one zener for both sides.

We could always ask Jim T. how he did it. Say, How'd ya cut the tops off the triangle wave Jim?

Of course you've got to make the triangle wave too. (I've done the Volatge->R into integrator once. I got greedy and made the input resistor too big (input current too low) and found all sorts of sneaky current leakage.)

George H.

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rickman 13 years ago

Yes, I mentioned the CPLDs above, but they are CPLDs and have very small capacities and very high prices relatively. For the same cost as around

64 CPLD macrocells you can get over 1200 LUTs and FFs, 64 kbits of RAM, up to 95 I/Os, 12 differential inputs and a PLL. They are also very old technology at this point.

Rick

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George Herold 13 years ago

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...Jim Thompson

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Keep it all balanced (DC and slope wise) and at some gain the third harmonic should go through a minimum.

George H.

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krw 13 years ago

No, it's not. "Low power" is a design parameter.

I didn't ask for a product brochure. I can look them up myself.

Wrong. The only factor in the book price is "what the market will bear". If you think there is any relationship between manufacturing cost and book cost (other than a 'Do you understand my point?

That you're infatuated with Lattice? Sure.

I don't think it's going to succeed. That's not the market for programmable logic; too expensive.

Buy a scroll wheel.

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sine wave generator

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