sine generatore redux

Dec 23, 2012 16 Replies

(wrong ng first.. 8-( )



Tried a 32MHz PIC24 as a DDS using a 16usec PWM cycle (8 bit), running from 3.3V. Three 32-bit phase accumulators. I used the Bell 202 frequencies.



With a simple RC filter (5K6/10n -> 10K/10n).. no calculation, just guesstimated, I get pretty decent behavior (2nd harmonic 35 dB down):-



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I have four simultaneous outputs PWM'd at 62.5kHz (right now, running from the internal calibrated oscillator, no crystal)


  1. 1200Hz sine wave
  2. 2200Hz sine wave
  3. 1200/2200Hz continuous phase switched by input
  4. 1200/2200Hz coherent phase "

(Re) discovered a nasty errata on the PWMs .. even worse than documented, I think. Avoid 0x0000 as a duty cycle, so I regenerated the sine table to avoid that.



Only problem I see is that (because of the filter) the two frequencies have quite different amplitudes.. 1.2V and 1.8V p-p roughly. Could be solved by a better filter, or do the switching externally, or use sine tables with different amplitudes.



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It would be easy enough to use a crystal and/or to trim the frequencies with ADC inputs, but the internal oscillator gets pretty close. Changing the frequencies in the source code is trivial:



Phaseinc1 = 1200.0 * 16E-6 * 256*256*256*256 + 0.5; Phaseinc2 = 2200.0 * 16E-6 * 256*256*256*256 + 0.5;


Not including the filter, the entire circuit is just the chip itself and bypass caps (2 x 0.1uF and 1 10uF are the official recommendations- the latter for the internal 2.5V core regulator bypass).


Best regards, Spehro Pefhany


"it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com

The 2nd harmonic distortion is mostly cause by the phase modulation of the signal by the PWM. Reducing the modulation will reduce this.

On Sunday, December 23, 2012 8:37:18 PM UTC+2, Rocky wrote: Reducing the modulation will reduce this. Should be reducing modulation INDEX will reduce this

signal by the PWM. Reducing the modulation will reduce this.

Reduce the depth of PWM modulation?

I could reduce it to 6 bits, or I could keep the modulation at 100% over 6 bits and crank up the PWM to 250kHz from 62.5kHz.

Best regards, Spehro Pefhany

"it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com

For our low-end stuff we use LPC17xx series ARM processors that can run up to

100 MHz and have a 10-bit DAC. That would do a decent FSK DDS at, say, a 1 MHz hit rate, which would be totally coherent and put the data jitter out of sight at 1200 baud.

But I think I'll stick with my analog thing. It requires no engineering-level programming, no code or build scripts to release, and no production chip programming. Our little JTAG connector alone costs more than the parts I'll need to do it analog.

John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom timing and laser controllers Photonics and fiberoptic TTL data links VME analog, thermocouple, LVDT, synchro, tachometer Multichannel arbitrary waveform generators

Just for interest I tried it with an PIC16F628 using a 4 bit resistor DAC (

5K, 10K, 20K & 40K) with a sampling rate of 20kHz and got the highest spuri ous signal at about 34dB down using a 1st order filter with cutoff at 3kHz. The highest spurious signal was at 17.8kHz Excluding the sin table a total of about 20 lines code.

Tempting to do the demodulator.

@John Larkin - What baud rate?

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as soon as you start making more than a few hand fulls it makes sense to make a test fixture with pogo pins, even if it is analog there's always a few voltages etc. that needs checking so programming as just one more step it the test

or you could go for something like:

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-Lasse

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It still need someone to program it on a production basis, and it needs to be tested anyhow. That pogo fixture needs to be built and wired. The analog thing is easier.

Nice, but it looks like the only termination is RJ12. That's strange. Are there any JTAG pods with RJ12?

John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom timing and laser controllers Photonics and fiberoptic TTL data links VME analog, thermocouple, LVDT, synchro, tachometer Multichannel arbitrary waveform generators

10K, 20K & 40K) with a sampling rate of 20kHz and got the highest spurious signal at about 34dB down using a 1st order filter with cutoff at 3kHz. The highest spurious signal was at 17.8kHz

That's much more interesting (ie, much more work). An analog demod is bog simple, too.

How come everybody wants to program, and nobody wants to design circuits?

1200. Running the DDS at 20K/second will make some jitter in the data. It would be better to run it more often. I'd go for 100K at least, if I did it on a small ARM with a real DAC. Which I won't.

Analog is more fun.

John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom timing and laser controllers Photonics and fiberoptic TTL data links VME analog, thermocouple, LVDT, synchro, tachometer Multichannel arbitrary waveform generators

That's kind of a neat solution for smaller quantities. No fixture.

I wonder what connector John is using.. the usual JTAG 2x10 shrouded header is cheap, but pretty big.

Of course the PICs need fewer pins for programming and debug.. I usually use a 2x3 header. That gives you Vdd, ground, /reset, the two (data and clock) programming/debug pins and a spare pin.

The particular PIC24 I used (PIC24FJ16GA002) $1.86/100 also has a JTAG option.

Since it has 5 PWM outputs I was thinking maybe you could combine PWM outputs with a R/2R ladder to do even better, but that's just crazy talk.

Best regards, Spehro Pefhany

"it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com

I think programming has its challenges too. In this sort of application the benefit is repeatability without trim-pots.

The 6p6c RJ plug is a Microchip thing.. they put that on their in-circuit programmers and debuggers (non-JTAG).

Not a very practical choice at the user end-- the RJ female is undesirably large and tall for most products, and it doesn't even fit a proto board. Most of us use a 1 x 6 or 2 x 3 header and an adapter cable for in-circuit programming and debugging. At least the programmer end is easy to unplug and replace when the cable dies.

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Best regards, Spehro Pefhany

"it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com

We use the micro (50 mil) shrouded version for most of our ARM stuff. I used to (still sometimes do!) use the regular 0.1" one for 68332 BDM.

John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom timing and laser controllers Photonics and fiberoptic TTL data links VME analog, thermocouple, LVDT, synchro, tachometer Multichannel arbitrary waveform generators

I think if you can do it digitally for less then it's better to go that way.. repeatable, fewer worries about temperature, unit-to-unit variations and so on. No trimpots unless you really want them. I used to make PID controllers with "I" time constants in the scores of minutes with analog parts, don't miss that one bit, but the experience is still useful for when things really need to be that way. You can also readily compensate for the shortcomings of analog bits once you get things ino the digital domain- pre-distort, apply customized 2D transfer functions for temperature compensation, etc. etc.

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More fun to get something working, but still a fair bit of work to make it guaranteed to work under all conditions and with parts at all tolerance extremes.

Best regards, Spehro Pefhany

"it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com

10K, 20K & 40K) with a sampling rate of 20kHz and got the highest spurious signal at about 34dB down using a 1st order filter with cutoff at 3kHz. The highest spurious signal was at 17.8kHz

If the customer wants something different its nice to have things under software control. A while ago I designed a high power function generator. Not high frequency but interesting enough due to the voltages and power output required. Somewhere halfway thru the project it turned out it needed to be current controlled instead of voltage controlled. Because the whole thing is controlled by a microcontroller and not dedicated PWM chips the change was made within 30 minutes. Same story when it turned out the production batch was more prone to core saturation than the prototype.

Failure does not prove something is impossible, failure simply indicates you are not using the right tools... nico@nctdevpuntnl (punt=.) --------------------------------------------------------------

would

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But that's what I do. Most programming is green eye-shade stuff, about as much fun as balancing a checkbook. It's not as if code doesn't have bugs.

Samtec makes some pretty nice smaller scale items.

We still use the 0.1" stuff for interconnects in in-house test gear, simple 2 layer PCBs, etc. . But all of our product level circuit assemblies use the smaller scale stuff these days. We are even phasing out a lot of older, legacy gear. Funny to see thousands of dollars worth of working gear hitting the scrap dumpster.

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