sine generator redux

Dec 23, 2012 1 Replies

Tried a 32MHz PIC24 as a DDS using a 16usec PWM cycle (8 bit), running from 3.3V.



With a simple RC filter (5K6/10n -> 10K/10n) I get pretty decent behavior (2nd harmonic 35 dB down):-



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I have four simultaneous outputs PWM'd at 62.5kHz (right now, running from the internal calibrated oscillator, no crystal)


  1. 1200Hz sine wave
  2. 2200Hz sine wave
  3. 1200/2200Hz continuous phase switched by input
  4. 1200/2200Hz coherent phase "

(Re) discovered a nasty errata on the PWMs .. even worse than documented, I think. Avoid 0x0000 as a duty cycle, so I redid the sine table to avoid that.



Only problem I see is that (because of the filter) the two frequencies have quite different amplitudes.. 1.2V and 1.8V p-p roughly.



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It would be easy enough to use a crystal and/or to trim the frequencies with the ADC input.


Not including the filter, the entire circuit is just the chip itself and bypass caps (2 x 0.1uF and 1 10uF are the official recommendations- the latter for the internal 2.5V core regulator bypass).


Best regards, Spehro Pefhany


"it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com

Tried a 32MHz PIC24 as a DDS using a 16usec PWM cycle (8 bit), running from 3.3V. Three 32-bit phase accumulators. I used the Bell 202 frequencies.

With a simple RC filter (5K6/10n -> 10K/10n) I get pretty decent behavior (2nd harmonic 35 dB down):-

formatting link

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I have four simultaneous outputs PWM'd at 62.5kHz (right now, running from the internal calibrated oscillator, no crystal)

  1. 1200Hz sine wave
  2. 2200Hz sine wave
  3. 1200/2200Hz continuous phase switched by input
  4. 1200/2200Hz coherent phase "

(Re) discovered a nasty errata on the PWMs .. even worse than documented, I think. Avoid 0x0000 as a duty cycle, so I redid the sine table to avoid that.

Only problem I see is that (because of the filter) the two frequencies have quite different amplitudes.. 1.2V and 1.8V p-p roughly.

formatting link

formatting link

It would be easy enough to use a crystal and/or to trim the frequencies with the ADC input.

Not including the filter, the entire circuit is just the chip itself and bypass caps (2 x 0.1uF and 1 10uF are the official recommendations- the latter for the internal 2.5V core regulator bypass).

Best regards, Spehro Pefhany

"it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com

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