Schematic preferences

I was trained at Tektronix for drafting electronics, so my preferences come from there.

Let me state the following rules used at Tek:

(1) Unless clearly justifiable for other reasons, electron flow from bottom of page upwards to the top. All parts oriented so that this is obvious. (No BJT spun around to make electron flow go otherwise, unless I can _justify_ clearly why it reads better.)

(2) Signals flow from left to right across the page.

I think of these two rules, easily. The electrons flow like a waterfall upwards (or positive charges flow down, your choice) in order to "permit" signals to flow across, from left to right. The signals ride across the sheet on the flow.

(3) Don't bus power around unless there is some physical characteristic that must be emphasized by doing so. If the emitter of a PNP BJT is tied to +5, I don't bus the emitter over to some heavy black line tied to power. I just stub it right there to the named +5 rail. It does NOT help readability to have lots of black lines running all over the place, almost as though they are signal lines. In fact, it distracts from understanding. You don't need to know any of the other connections to that named +5 rail to know what is happening at the BJT. All you need to know is that it is at that rail's potential. The wire just adds "noise" to the page and makes you go trace around looking to see that it actually _is_ a rail and not something else.

That's enough for now, I suppose.

Jon

We do everything B size, landscaps, an we have a couple of B size laser printers.

Our first sheet is a block diagram and table of contents.

ftp://jjlarkin.lmi.net/22SS346A.pdf

We avoid high density in favor of clarity. The schematic I'm checking now is 34 sheets.

I'd expect that rule to make things quite a bit uglier.

Right. No busses.

We use big (75 mils in PADS) dots. There's nothing wrong with a 4-way connection if the dots are obvious.

R12 4.7K

I hate the "4k7" notation.

OK

OK

The trick is to get the layout person to actually place them that way!

Other

We are lately making all pins visible... no hidden power/ground pins.

If it's useful, put it there.

We document no changes on the schematic. We maintain separate change files.

We do have a NEXT folder on a server, with a sub-folder for each board. That contains text files like "B_to_C.txt" where anyone in the company can add notes, requests, suggestions of things to consider for the next rev.

John

PNP emitters up, NPN emitters down!

John

--- If one knows what's happening at that junction, that's fine, but it's happened more than once that a drafting droid saw two lines crossing and figured they should be connected.

Resolving that ambiguity by breaking that "intersection" into two tees disappears the problem.

JF

I really want the same thing out of the schematic as do my "customers". In a year I won't remember what I did, so it's got to be readable (source code is the same deal - in spades).

Yes, Landscape always seems to work out better. I just use 11x17 and stick it in a notebook sideways, with a fold. I'd do longer (I really print with a 1" offset so it comes out 11"x18") but haven't found I need more space that direction (without running out of vertical space first). OTOH, the other engineer likes C-size prints. I find they're a PITA on the bench (or pretty much anywhere). I end up printing his on 11x17 and squinting. ;-)

I try, though the drawing tools suck. I'd much prefer a hierarchical design, killing both birds, but the software isn't up to it.

I can usually keep off-sheet connectors to a minimum, placing an entire "channel" or such one sheet - maybe two. There is usually a logical break somewhere. It often costs a bit of paper, though.

Sooner or later the design is going to overflow a sheet. Not only is "E-size" a PITA, but so is "C-Size", IMO. Larger pages have more signals running around, too. Long wires are hard to follow.

Get glasses. ;-) Bifocal reading glasses (two strengths, both for close work) work for me.

I agree, though I'd rather have signals connected on a page by name (as long as it's *clear*) than connectors broken apart and scattered all over the schematic. Sometimes it's not clear what the best solution is.

Good idea, when it's possible without making the sheet look like a rat's nest. It usually is, though there are exceptions.

Left to right (bidirectionals go either way unless there is tristate output on the net - then it gets more complicated). Top and bottom are for power only.

Wrong! Busses wherever they make sense. *NEVER* connect bussed signals off page. Off-page connectors on busses are shown as busses

Agreed.

Hierarchy is your friend. Schematic entry tools aren't. ;-)

Be careful with step and repeat. It's *really* easy to forget to change all instances of facilities that differ between copies. DRC and browsing the netlist can help here.

Significance, no, but importance, yes. IOW, the netlister shouldn't care about color but the human reading it does. It *must* be consistent.

I don't have problems with 4-way streets. Dots are plain enough to see.

IEEE symbols suck. Rockets and bullets, everything else is a box; clocks and active levels marked appropriately

Yes, and signal names must match the symbol's polarity.

I put the RefID on top of the value with the value inside the component if it fits.

That depends. Sometimes a connector sheet can be used to show the layout of the connectors. This is very handy when there are a lot of the same kinds of connectors. Again, the idea is to convey as much information as possible about the board.

Diagree. It's very handy to have our XLR connectors look like XLR connectors, in the proper orientation. Information. Interboard connectors and headers also are drawn physically (in order, odds on one side and evens on the other). BNCs are drawn big-circle little circle/dot (dots=male, circles=female).

If possible. Large components get their own power/ground/decoupling (sometimes clocks or references) sheets. Small components (gates, op-amps, etc.) get power on the pages they appear. I'd change that if I were king, but the software sucks.

We put ECO notes on the sheets in red before the ECO and in blue for one revision after, in addition to the "Notes:" block on page-1. We also put a note on each subcircuit explaining what it is: +--------------------+ +-------------------------------+ | 4-pole Butterworth | - or - | Load Switching Bus | | H.P. F0=1kHz G=6dB | +---+---+---+---+---+---+---+---+ +--------------------+ | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | +---+---+---+---+---+---+---+---+ |8nF|4nF|2nF|1nF|800|400|200|100| +---+---+---+---+---+---+---+---+

No pictures. They take way too much space. Voltages, yes. Keping any documentation up to date is a problem. Notes are no different than comments in code.

Disagree, sorta. We put the revisions on the first page of the schematic and keep two or three (whatever fits). It's there as a reminder only and certainly doesn't supercede the ECO system. We also add notes to the schematic (in red) to incorporate if we ever hit the board again. Again, those are reminders only and don't supercede the problem reports and such.

Here's one. ;-) We have schematics that are essentially twelve itsy pages of schematics crammed onto one C-sized page. *Very* bad, though when I gagged during the interview it made big points with the engineering manager. ;-)

Ah, but Tek doesn't do that -- IIRC (and maybe I don't), they often drew balanced circuits symmetrically, like so;

The side-by-side approach is more common outside of oscilloscopes, but does lead to messier drawings because you're showing everything twice:

Tim

I have one of those, actually.

Tim

-- Deep Friar: a very philosophical monk. Website:

That comes from +V on top, -V on the bottom.

Op-amp: (-) on top of (+). D-FF: 'D' above 'Ck' (preset above D, Clear below Ck). Q above /Q

When was the last time you saw a drafting droid? ;-)

It takes valuable "routing" space. Signals should have as few bends as possible across the page. This gets important if all sheet inputs are on the left and outputs on the right.

You might find that your printer supports so-called Super-B-sized paper at

One thing that hasn't been mentioned is the size of the stock library symbols suppled with the schematic capture program: Even though most people end up drawing their own symbols anyway, the size of the supplied symbols tends to set a precedent for the relative scale of various symbols. In my experience, ORCAD goes for relatively larger symbols -- an ORCAD D-sized sheet sheet often prints out without too much squinting necessary at 13"x19", whereas in many other schematic capture programs it'd be pretty much unusable.

Do you use the European convention of drawing resistors as rectangular boxes then? Or you mean just on bigger items like ICs?

Although you have to be careful that people don't mirror the symbol on you. :-) (With multi-pin connectors, sometimes the hook-ups are a lot cleaner if you go ahead and mirror the symbol, so it's a subjective call if you should make a rule that symbols drawn to resemble the physical part should never be mirrored or not.)

I put a small gap in the outer circle so that it doesn't appear as though you're shorting the inner conductor to the shield.

I usually give power rails and ground different colors (e.g., +5V in red, ground in green). This was prompted by early versions of Pulsonix that made it *way* too easy to accidentally end up with an isolated sub-net (e.g., a net between an IC pin and a resistor) that was connected-by-name to ground or a power rail (long story, but suffice to say that in more recent versions it's now almost impossible to do this accidentally), so it provided some immediate visible feedback if you were shooting yourself in the foot in such a manner. I liked the effect, though, and hence have kept doing it, adding now, e.g., purple to indicate 50ohm traces. (These are all just net attributes so it's easy to change colors or display everything in all black again if someone prefers.)

Do you use PADS for layout? If so, do you use a 3rd party tool such as Prescience to pass design constriants between ORCAD and PADS?

---Joel

Let me add net-naming conventions to the discussion:

All voltages (nothing else) get a '+' or '-' prefix.

Negative active digital signals start with '/' or end in "_n" (leading "/netname" gets converted to "netname_n" in an FPGA)

Differential pairs get a '+' or '-' suffix (so they collate properly).

I like BiCapitalization for words, and Under_Scores to note hierarchy. e.g. ChanA_OutputGain. This also allows netlists to be collated properly.

Hmm, dinnertime.

It supports 24" x 1-roll. It's an HP DesignJet. ;-)

Orcrap's symbols are *huge*. I draw my own.

No, resistors are squiggles. Just the bigger items. When I first started in IBM, everything was a box. A resistor looked exactly like a capacitor, like an AND gate, and a DFF. Schematics had to be drawn on chain printers. Didn't like it much. ;-)

Whether or not it's mirrored depends on which side of the connector you're looking at. ;-) Point taken.

Works for me. It still looks like what it is (perhaps without the tangs).

I just put global connectors on the pins, or as close as possible. A global power pin might connect a dozen pins on a processor.

I don't do layout. The layout guy uses Allegro. The other hardware engineer uses Layout, when he does layout (only legacy products anymore).

Yes. Maintain the flow direction uniformly. Some exceptions, but it's a good rule.

Jon

I prefer xSignalName, but I don't have any gripes about / or _n -- it's more important that whatever standard someone chooses, that everyone else who then works on the schematic adopts the same standard.

I like diff-amps with the components side by side, mirrored left and right. +V at the top, -V at the bottom.

Just by way of example, here's a poorly laid out circuit:

In my opinion. Find the +rail and ground lines and trace them around the schematic. What's the point in the busing everywhere? How much do those 'wires' interfere with following function?

Now, if you are point-to-point wiring stuff you might lay out things and then run the heavy wire around like that, soldering to it along the way, I suppose. Maybe. But if you are trying to follow the operation with understanding there are better ways to draw it.

It's not the worst example around. But it addresses some of the points. Emitters from different PNP's pointing differently. Emitters from NPN and PNP pointing the same way. Bus wires trapsing around all over the place almost looking as though they might carry signal. Etc.

Jon

The way I do it:

I draw on size B and reduce to a size A so that an 8.5x11 printer can print it.

Unless there is a darn good reason, all op-amps have their out puts to the right. The "darn good reason" may be that it is in the feedback path.

The power supplies are always named as a voltage not just Vcc

All parts have the power pins shown. The + is usually on the top. The exception is references and regulators where it is on the left.

Signal names are always somewhat meaningful and never something like "SCATCB" as I have actually seen.

In general the connections to a sub block are shown with the inputs on the left and output on the right. Exceptions are made for feedback signals.

I never crossed lines as a connection point. If two lines connect to another line, they are offset.

PNP transistors are drawn with the emitter up.

Bypass capacitors are shown on the sheet with the parts they are near

The triangle ground symbol means the circuit ground of the PCB. The three line symbol means the connection to the chassis. The one like this: !

----------- / / / /

means planet earth

Mounting holes are shown if they have electrical meaning.

Notes go in the lower left corner of the sheet.

The reference of a part encodes the page it is on. R307 is on page 3

All my engineers (excepting me!) CAD their own schematics. I still draw with pencil on vellum and let The Brat enter them for me. But I check them very, very hard.

John

Yikes! Production would lynch us. After the layout is done, we resequence the reference designators in physical and numeric order and back-annotate the schematic.

John