My stuff is rarely more than about 300 parts per board, 4x6 inch-ish. This one will definitely be sent out if it goes into production. Simon is working on the code and a prototype board, based on an LPC1769 LPCXpresso development board. My #2 daughter Magdalen is coming up to speed using Eagle, though when she gets a real job I'll probably be left out in the cold. ;)
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 USA +1 845 480 2058 hobbs at electrooptical dot net http://electrooptical.net
Not filling large, or even small vias on some boards can cause problems like excessive phase noise in a PLL based synthesizer. Even when they are between ground planes.
Huh? Filling the vias does nothing for noise. Filled vias are expensive, so rare.
Huh, hell. Those plated vias are small inductors between the RF & the ground plane. An obsolete bare ceramic disk cap was replaced with SMD caps of the same value, and production ground to a halt. Simply filling the vias that were in place to solder one side of the caps to the PC board reduced the phase noise to well within the specifications. The engineers responsible for the product didn't believe me, till I made them watch the noise go away after I filled the open vias on the VCO portion of the board. An added L/C trap for the 100 KHz reference frequency in the loop control cleaned it up, even more.
IMHO the PCB layout must have been extremely crappy for something that small to have an unfluence. Maybe its the caps themselves behaving better after an extra heat treatment. I'd look into it more closely because it all sounds too LF (100kHz multiplied into what?) for vias to have a really bad influence.
-- Failure does not prove something is impossible, failure simply indicates you are not using the right tools... nico@nctdevpuntnl (punt=.) --------------------------------------------------------------
o n
the
gstill hard to see what would cause such an improvement
and I think in normal pcb terminology a filled via is not a via filled with solder, it is a via filled with epoxy after plating inside the hole and then plated again so you get copper covering the hole
-Lasse
Filling copper vias with lead or tin does nothing. If you're worried about heat or inductance, use a dozen vias and heavier copper. It's
*MUCH* cheaper than filled vias and far better. The only time I've filled vias was when we needed to carry more current and we didn't have room for more (lipstick on a pig).
Probably wasn't inductance, because a filled via has almost exactly the same inductance as an empty one. That's because there's no B field inside a conductor of circular cross-section due to an axial current, so filling the via makes no change in the field configuration.
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 USA +1 845 480 2058 hobbs at electrooptical dot net http://electrooptical.net
The issue (at least one of them) is with the 'annular ring' which makes up the 'hat' and base of the plated through hole assy. that 90 degree transition (on the inside edge) can have a very sharp corner.
Once it gets filled, it is almost assured that it will be a radius instead.
And have better (read reduced) EM radiation characteristics.
The way you compute inductance is to find the B field as a function of the total applied current. The EM field energy density is B**2/(4*pi) in Gaussian units, or B**2/(2*mu_0) in SI. Integrating this over all space, and equating it to the total energy in the circuit picture, you can compute the inductance.
I invite you to make a numerical estimate of the difference in B**2 due to filling a single via in a PC board, and then estimate the change in inductance due to the corner. When you do that, you'll find that the difference is a few picohenries at most.
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 USA +1 845 480 2058 hobbs at electrooptical dot net http://electrooptical.net
o
en
& the Ding
t -
Well at a low enough frequency there'll be current in the center.
George H.
nto
suse
Even
he RF & the
SMD
lling
he
eso
h makes
eus
Hmm OK, maybe the pcb had some thin via's.
George H.
t -
the
Some open vias, that I might believe. Thin? Not so much. A cylindrically symmetric current density directed along the axis produces zero B field in the centre, and nearly zero everywhere else inside. Plus of course the volume inside the via is tiny.
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 USA +1 845 480 2058 hobbs at electrooptical dot net http://electrooptical.net
430 to 650 MHz. The design had worked well for over 15 years with the original uncased disc caps that had one side soldered to the board. IOW, the vias had to be filled when using the original, early & crude SMD capacitors. As far as a 'crappy design', it made the company millions of dollars every year that it was in production as one of the cleanest synthesizers on the market. What finally killed the design was the shrinking size of the product which used a hybrid VCO module built by a vendor.
The new cas were soldered 'tombstone' style, near the open vias, so there was no 'extra heat'. In fact, they were filled from the back side of the boards.
Filling them changed the center frequncy of the VCO, it went down a few percent. They were right at the end of a loop on the board that was part of the VCO.
the
They were a little over 1/8".
In my experience the inductance of vias plays no significant role in that frequency range.
Well.... Microsoft made billions from Windows and Office. A succesfull product doesn't mean its top notch technology.
So the real problem is somewhere in there. When changing a product it is tempting to change the PCB least as possible but sometimes its better to redo and re-think the whole PCB.
-- Failure does not prove something is impossible, failure simply indicates you are not using the right tools... nico@nctdevpuntnl (punt=.) --------------------------------------------------------------
Mmmh. Your typical via has about 250pH of inductance. That's 1 Ohm at 650 MHz. Sometimes it matters, sometimes it doesn't.
Jeroen Belleman
The inductance of a via to a ground plane should be much (5 to 10 times) lower. But the exact number is arguable without knowing the exact board layout. Anyway I still have the feeling that fixing a problem by just filling the vias is a fix that needs to be frowned upon very seriously :-)
-- Failure does not prove something is impossible, failure simply indicates you are not using the right tools... nico@nctdevpuntnl (punt=.) --------------------------------------------------------------
The 250pH figure comes from a measurement I made some time in the past. Granted, some care is needed to get any accuracy at these levels, and admittedly, this is a ballpark figure. I'm certainly not off by more than 50% or so. Filling a via doesn't change its inductance. Maybe I'll measure it again, to pin it down a bit better.
Jeroen Belleman
ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.