[Q] Fast Logic To Reset Core of a Communication Transformer

Feb 18, 2005 4 Replies

Hi all,



I have the following situation. In a design I use the MAX3088 as a failsafe half-duplex RS485 driver, driving a communication transformer in order to isolate the external lines from the internal logic. The bitrate is ~3MBit. The link layer telegram may not be completly dc-balanced. At the end of the telegram the core of the communication trafo may still contain dc-biased energy. I have a third yet unused winding on the transformer I would like to use in order to reset core by "short-cutting" this third winding for 1..2 usec. Telegram interfame spacing would allow for this. Now I am looking for a hint or for some good ideas how it can be done.



Any suggestions or ideas hints would be appreciated.



Best Regards Markus


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On Thu, 17 Feb 2005 16:02:18 +0100, Markus Meng wroth:

The core will NOT retain any energy. You need to do nothing special.

Jim

James Meyer schrieb:

Using a core, and an RS485 half duplex communication bus will result into a so called trafo-kickback, being dangerous for proper end-delimiter recognition and yealds to unwanted noise at the end of a telegram. This will happen if the protocol is not dc-balanced, and the half-duplex driver will be switched off after xmition of frame.

Markus

On Fri, 18 Feb 2005 07:58:31 +0100, Markus Meng wroth:

Please look at page 14 of the pdf file at

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to see a way to use transformers in an RS-485 network without problems due to DC currents.

Jim

Any method that allows RS485 to be transformer-coupled will be substantially different from RS485, and that one certainly qualifies.

I used a method circa 1990 that I believe was at least a little cheaper / simpler, and still ended up looking like RS485 (at the time, I called it "6+2M" encoding) - just encode every 3 message bytes into a DC-balanced 4 byte sequence (there are more than 64 such sequences, enough left over for preamble etc if you need it. It's all physical layer stuff; it all depends whether you are limited at the hardware or software level.

But failing that, as long as you're using a UART and the transformer bandwidth is wide enough so all-ones bytes are still recognizable, you can always add big caps between the chips and the transformers, and clamp the chip side to around the rails; the periodic stop and start bits should be enough to keep the DC under control.

Tony (remove the "_" to reply by email)

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