The substrate is NOT used as a power path. There is metal to everything, AND substrate connections all over the chip... to a metal run.
Of course. I used to fudge the diffusion layers so that, when fully processed, there were my initials ;-)
...Jim Thompson
Jim Thompson a écrit :
Hmmm, all that at the expense of your customers?
This was at Motorola, where I did the mask set as well as the circuit design. I haven't done any layout myself since around 1978. It's been a specialty CAD function for quite some time.
...Jim Thompson
324: WTF?
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=A0 =A0 ...Jim Thompson
=A0 | =A0 =A0mens =A0 =A0 |
=A0 | =A0 =A0 et =A0 =A0 =A0|
=A0|
=A0 =A0 =A0 |
Most of the time when you try to "write" on a chip, it violates design rules. Now you might say who cares since you are not designing something that has to work electrically, but there is the chance that nonconforming resist might lift and then fall on functional circuitry.
I've designed very high speed stuff with SOT23 and SOT23-5 type packages. No problems at all.
whatsoever.
Oh, should we all learn Arabic now?
Yep. I have seen a lot of stuff built that way and even built stuff that way. Some time ago though.
No it's not unreasonable to oversample. It is unreasonable for a vendor to assume there is only one set of problems to be solved.
When the only tool you have is a hammer, the whole world looks like a nail.
Exactly backwards. I understand that it's stupid.
A 20b DAC doesn't necessarily mean 20b accuracy, either. Monotonicity is appreciated though.
When all you have is one bit, use delta-sigma.
John
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That's what we are using. I was interested in the PSoC for other reasons.
Only 4k Samples/S.
This is what we're using:
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I would have guessed the 3rd pin was a voltage sense, but who knows.
I bought some macro spacers for Nikon mount a few years ago on ebay. They were made in India or Pakistan, I forget, but not China. They were also not light tight. Talk about unclear of the concept.
Regarding the wall wart designer, they front the order in the states, so you don't have to deal with off-shore manufacturing. This is about
7 years ago, so I don't know if they are still in the wall wart business.
Which reminds me of something I've always wondered about - in the 4000 series CMOS family, the 4049B has power and GND on the same side, pin 1 and 8. I've always wondered why, but never could figure any reason...
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Yeah, and only 31 bits.
TI also has a new 18 bit SAR ADC, monotonic.
John
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Wow, those marketeers are really cranking up the hype--THIRTY_ONE_BITS?
The INL spec is 6 parts in 10**7, which is very impressive. It looks like a great part for a lot of things.
It is however nothing but a barefaced lie to claim 'no missing codes' for a converter which has a LSB of 3V/2**31 = 1.4 nV and also has 5 nV/sqrt(Hz) input noise. Even assuming no 1/f noise or thermal drifts, and even in the lowest bandwidth mode the converter won't even _SIT_STILL_ to better than 50 nV, a matter of 30 dB worse than their claimed 'no missing codes'. (And before you say that it's true on average, show me any ADC ever made that wouldn't be monotonic if you put in 35 LSBs of noise and averaged.)
The manufacturers should be ashamed of themselves. The only way they can get away with this sort of crap is because practically none of their customers actually knows how a delta-sigma works.
Cheers
Phil "colour me disgusted" Hobbs
Yep, It's all hype. But it's customer-driven. The more bits the better, right ?:-)
...Jim Thompson
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Well, "no missing codes" means just that. Histogram it for a while (a long while in this case) and see if all the bins get hit.
But disgusted? Even the 24-bit adc's can't deliver a steady, noiseless
24 bits. But for under $10, with programmable PGA and filtering, and 1 or 2 PPM true usable accuracy, they are still great.All based on a 1-bit DAC.
John
I couldn't care less.
Too bad April 1 has passed by.. I guess if we sent out a fake press release to a bunch of publications for a monolithic 64-bit ADC that's "a perfect match for the new 64-bit processors" it would a) get printed at least once, and b) generate a bunch of inquiries.
Historically, the 4049 was a plug-in replacement for the 4009, which was a level translator part; there were input power pins (Vdd and Vss) and a low-voltage output power pin (Vcc) so you could use the part with 15V CMOS input levels and TTL or DTL (5V) output levels.
When they made the 4049, though, they just powered the whole chip from the low-voltage power pin (Vcc) and left the Vdd position unconnected, which meant one could use the new part to replace the old.
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