In the datasheets, they rarely provide any specs regarding the noise performance of the comparators.
Would it be reasonable to assume that the noise of the fast comparator is similar to the general purpose bipolar input stage? Can we speculate about the noise based on the bias current?
More intricative question: what is the efficient noise bandwidth of a comparator? Would it be valid to assume that the noise bandwidth is at the order of 1/(2*Pi*propagation delay) ?
Practical observation: the noise of a CMOS logic gate used as a comparator is about 6dB higher compared to the typical high speed comparator IC.
Vladimir Vassilevsky DSP and Mixed Signal Design Consultant