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determining minimum current loop bandwidth

I'm designing a current mode switching power supply with a load that will have a very strong load current harmonic at 50Hz (repeating sine wave from

100mA -> 1A -> 100mA in 20mS). I need the current control loop to have enough bandwidth to regulate this so it has less than 5% effect on the output voltage. There is not sufficient bulk capacitance on the output to supply the 50Hz current due to packaging so the control loop will see a large portion of it (assume all of it).

How do i determime the bandwidth and loop gain required to achieve this level of performance?

Reply to
Mook Johnson
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Here is the simplest estimate:

Start with how much of the ripple attenuation the loop should provide at the given frequency. This depends on your topology. Then assume that the open loop gain rolls down towards the high frequencies as 6dB/oct. Figure out the frequency where the open loop gain will be 0dB - this is the loop bandwidth.

Vladimir Vassilevsky DSP and Mixed Signal Design Consultant

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Reply to
Vladimir Vassilevsky

A few KHz should do it. Post a pic of the schematic.

John

Reply to
John Larkin

Off the top of my head, I would say the switching frequency is the first factor that governs the regulation response. And the next factor would be the amount of capacitance being used on that switching carrier frequency for the filtering process. I suppose one could go as far as putting a regulating shunt load on the output to increase the Skew rate.

Lots of factors.. But in my opinion, the switching frequency is the major contributor here for the response time.

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Reply to
Jamie

Mook Johnson snipped-for-privacy@mook.net posted to sci.electronics.design:

A combination of SPICE and experimenting sounds like the quickest way to a solution to me.

Reply to
JosephKK

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