Multiply 1Hz timebase

If you have time to wait for a control loop to settle, you divide a voltage dependent oscillator by those integers and phase lock the divided clock to the 1 Hz reference.

A CD4046 chip would do the phase lock:

How evenly spaced do you need the pulses to be, and how long a startup time is acceptable? Direct phase locking will work just great if you can wait a long time (a minute or thereabouts) for the loop to settle down, or if you can stand very unequally spaced pulses, in which case you can acquire lock in one cycle.

Cheers,

Phil Hobbs

I would prefer even spaced pulses, even if it takes a minute. Can you point me to a suitable circuit?

I am a bit short on resource materials here, and could find nothing sufficiently explicit online.

Starting with 1Hz, what is the highest practical frequency that can be obtained without a range selector?

Many thanks,

Al Klein

There is no practical limit - some people phase lock a 10MHz oscillator to a 1Hz referecne - but jitter/phase_noise will increase as the multiplier.