I am trying to build a 16 X 16 bit multiplier using Mentor Graphics. In the design of this multiplier, for the adder blocks should I go for a
Here are several different options:
A few years ago I made a 12 x 12 using the Carry Save Array method. It can easily be expanded to 16 bits.
How fast do you need the results from the multiply?
If you have all day, a 1 bit adder and shift register design uses about the least silicon.
A 16 bit multiplier should have a 32 bit accumulator if all of the possible bits of precision are considered. How fast does this have to run? Many DSP processors and some micro- controllers have multiply instructions and can do a it a one clock cycle. If speed is not an issue, you can do it in any processor even a PIC with a software multiply. I takes several hundred steps but that may be fast enough for many applications. If it were me, I'd look for a single chip solution probably using a microprocessor if speed is not important or a DSP chip if it is. Bob
The carry save blocks were 4 bits, 8 bits or 12 bits?
i am looking for speed in the range of 45-60 ns for clocked multiply time
Use a QSM.
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