I am trying to build a 16 X 16 bit multiplier using Mentor Graphics. In the design of this multiplier, for the adder blocks should I go for a
16 bit adders or should it be 8 bit or 4 bit. I am not sure on how to choose the optimal number of bits for the adder to be used in this multiplier. Any pointers to this will be helpful.Here are several different options:
A few years ago I made a 12 x 12 using the Carry Save Array method. It can easily be expanded to 16 bits.
How fast do you need the results from the multiply?
If you have all day, a 1 bit adder and shift register design uses about the least silicon.
-- -- kensmith@rahul.net forging knowledge
A 16 bit multiplier should have a 32 bit accumulator if all of the possible bits of precision are considered. How fast does this have to run? Many DSP processors and some micro- controllers have multiply instructions and can do a it a one clock cycle. If speed is not an issue, you can do it in any processor even a PIC with a software multiply. I takes several hundred steps but that may be fast enough for many applications. If it were me, I'd look for a single chip solution probably using a microprocessor if speed is not important or a DSP chip if it is. Bob
The carry save blocks were 4 bits, 8 bits or 12 bits?
i am looking for speed in the range of 45-60 ns for clocked multiply time
Use a QSM.
ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.