mosfet operating temperature

The 150C junction limit is determined by plastic packaging restrictions. In hermetic packaging the same wafer will be restricted by the mechanical attach limitations usually to below 200C.

I assume this is a worst-case temperature, presented under worst-case conditions. So long as junction limits are not exceeded, there is no beef, but there are some design guidelines for reliability that arbitrarily set limits on junction temperatures below sheet-specified limits.

The power mosfet device itself will function floating in the melted die attach solder - but may fail on stresses developed during subsequent cooling. Plastic package seals, intended to prevent ingress of moisture, are toast after a single event like this.

If you feel uncomfotable with published ratings, you might invoke NAVMAT-P4855 or its successor NAVSO P-3641 as a reference in EARLY purchasing or design specifications.

RL

With such case temperatures, the heat sink appears too very small.

At high surface temperatures, all kinds of contaminations, especially dust, will be deposited (burned) on the surface, which will change the heat sink characteristics, possibly increasing the junction temperature even further.

Paul

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...and do not forget pulse power curves.

So mounting the die on black diamond would not be much better?

by

Do you perhaps know of a published discussion of this effect? I am curious how they discriminated between film resistance and phonon impedance mismatch at a solid-liquid interface. All of the rather dated heat transfer books I have lump all solid to fluid interface "excess" thermal resistance effects as film resistance, attrributed to the layer of fluid in contact with a solid surface being held essentially stationary by weak bonds to the solid and the associated limitation to laminar flow near the surface where velocities are necessarily low due to friction. Film resistance is always an important factor in solid to fluid heat transfer, even if it does not appear in empirical lumped thermal resistance approximations like those in AN-1040. (Obviously any empirical approximation is only known to be valid over the ranges of measured values used to construct it, and one should be cautious about the use of any empirical formulas which lack a statement of the range of validity.)

In the case of metal to metal surfaces lacking a metalurgical bond (soldered, brazed or welded) the inevitable limited contact area and surface contamination (oxides, etc.) imposes a huge and highly variable thermal resistance, so I have a hard time imagining how one could measure the effects of phonon impedance mismatch for any interface except a metalurgical bond, and would be most interested in reading anything published on this effect.

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Glen, Though perhaps not what you are looking for. The effect (phonon mis-match at interfaces) has been studied by the low temperature community. The first reference I have (from G.K Whites LT book) is W.A Little (1959) Canad. J. Phys. 37 334.

George H.

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Thanks, George. I'll see if I can find a copy of the 1959! paper and search around a bit elsewhere. It suprises me that this effect (which makes perfect sense now that I have heard of it) has been known for such a long time and is not even mentioned in any of my heat transfer books from the 1970's.

Glen

Depends. Silicon on diamond might be really quite good--they have the same crystal structure and not that different mass densities. But a very thin diamond layer between two pieces of metal, say, wouldn't be quite as good as you might expect. It's really important below 0.5-1 cm**2*K/W, but that's fairly tough territory to get to--water cooling is generally needed.

It does mean that it's good to minimize the number of joints between dissimilar materials.

Cheers

Phil Hobbs

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I think I found a review article in Reviews of Modern Physics--I don't have that nice technical library anymore. The most famous example is the Kapitza interface resistance between superfluid helium and anything else, which is a huge effect down below a couple of kelvin.

Cheers

Phil Hobbs

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Glen, I think it's only 'really' important at low temperatures where the high energy phonon modes have been 'frozen out'. And by 'low' I mean below 1 K. White also gives as a reference "Matter and Methods at low temperatures" (1996) by F. Pobell. (Section 4.3) Which is a bit more recent.

George H.

How about tiny interlocking triangle grooves to increase contact area of the interface? For some cost-is-no-object thing?

John

I'd expect that to help some, yes. The scattering lengths are small compared to the feature dimensions you could obtain, so you should win by a factor of the surface area.

Interestingly, really thin indium foil with a quilted pattern embossed into it was one of the best thermal interfaces they came up with, and is now used between processor chips and their heat spreaders. The problem with both gallium and indium is that they corrode really easily, so you have to keep them under O-ring seals. That's easier for solids than liquids, of course.

Cheers

Phil Hobbs

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Well, if you WANT to make it difficult sure. But for plain vanilla apps it's really not hard.

Graham

-- due to the hugely increased level of spam please make the obvious adjustment to my email address

Yet another good reason to have 'live' heatsinks.

Graham

-- due to the hugely increased level of spam please make the obvious adjustment to my email address

in that

Too damn right. Or thermal time-constant if you prefer. That's where a lump of JL's copper can come in handy.

Graham

-- due to the hugely increased level of spam please make the obvious adjustment to my email address

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Thanks, "Kapitza interface resistance" was a good search term, and thinking about the whole impedance mismatch concept was an interesting distraction from real work :-).

Thanks for the additional info and references, I find it quite interesting even though I don't work at such low temperatures at all.

Glen

in that

maybe my initial post was not informative enough.

yes

essentially I've been measuring the case temperature versus loading. The main problem is that the unit is rated at 1A. This is fine, case temperature is 90 deg. However, if I drop the load progressively, I get a heat spike between

200 and 250 mA of 120 - 125 deg. Unfortunately, the unit does draw this level of current for a major part of its duty cycle. This measurement was similar for all 3 test units at 25 deg ambient. It is quite possible that it would be expected to operate in a hotter environment, hence my doubt as to its suitability for purpose. It would benefit from a heat sink, but is not supplied with one. As I said in another post, I think the problem is to do with the gate signal, but not having a circuit diagram nor the time, am not inclined to pursue it further for the time being, apart from passing it back to the manufacturer.

Steve

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