low power, HV-in regulator with depletion mosfet

John Larkin · 2013-06-01T17:52:53+00:00

Version 4 SHEET 1 1888 724 WIRE 768 -64 688 -64 WIRE 816 -64 768 -64 WIRE 208 48 -112 48 WIRE 352 48 304 48 WIRE 448 48 352 48 WIRE 688 48 688 -64 WIRE 688 48 528 48 WIRE 880 48 688 48 WIRE 1024 48 880 48 WIRE 1200 48 1024 48 WIRE 1392 48 1200 48 WIRE 1024 96 1024 48 WIRE 880 112 880 48 WIRE 1200 112 1200 48 WIRE 1392 112 1392 48 WIRE -112 160 -112 48 WIRE 1600 192 1440 192 WIRE 240 224 208 224 WIRE 288 224 288 96 WIRE 288 224 240 224 WIRE 448 224 288 224 WIRE 688 224 688 48 WIRE 688 224 528 224 WIRE 880 240 880 176 WIRE 1024 240 1024 176 WIRE 1200 240 1200 192 WIRE 1392 240 1392 208 WIRE 1600 240 1600 192 WIRE 688 272 688 224 WIRE -112 304 -112 240 WIRE 1600 352 1600 320 WIRE 288 384 288 224 WIRE 688 432 688 352 WIRE 688 432 352 432 WIRE 688 480 688 432 WIRE 288 592 288 480 WIRE 688 624 688 560 WIRE 288 704 288 656 FLAG -112 304 0 FLAG 288 704 0 FLAG 688 624 0 FLAG 880 240 0 FLAG 1024 240 0 FLAG 1200 240 0 FLAG 768 -64 OUT FLAG 240 224 GATE FLAG 352 48 SRC FLAG 1392 240 0 FLAG 1600 352 0 SYMBOL voltage -112 144 R0 WINDOW 0 58 41 Left 2 WINDOW 3 59 78 Left 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value 48 SYMBOL npn 352 384 M0 WINDOW 0 118 26 Left 2 WINDOW 3 94 68 Left 2 SYMATTR InstName Q1 SYMATTR Value 2N4401 SYMBOL zener 304 656 R180 WINDOW 0 -81 49 Left 2 WINDOW 3 -107 6 Left 2 SYMATTR InstName D1 SYMATTR Value DZ5.6 SYMATTR Description Diode SYMATTR Type diode SYMBOL res 432 64 R270 WINDOW 0 77 58 VTop 2 WINDOW 3 71 58 VBottom 2 SYMATTR InstName R1 SYMATTR Value 30 SYMBOL res 544 208 R90 WINDOW 0 71 56 VBottom 2 WINDOW 3 80 58 VTop 2 SYMATTR InstName R2 SYMATTR Value 10K SYMBOL res 704 368 R180 WINDOW 0 -56 70 Left 2 WINDOW 3 -62 34 Left 2 SYMATTR InstName R3 SYMATTR Value 10K SYMBOL res 704 576 R180 WINDOW 0 -59 76 Left 2 WINDOW 3 -67 40 Left 2 SYMATTR InstName R4 SYMATTR Value 10K SYMBOL res 1008 80 R0 WINDOW 0 61 42 Left 2 WINDOW 3 61 78 Left 2 SYMATTR InstName R5 SYMATTR Value 1K SYMBOL cap 864 112 R0 WINDOW 0 53 16 Left 2...

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John Larkin 13 years ago

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past.

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I hate the conventional mosfet symbol. I draw them as BJTs with insulated gates. Oh, I hate the usual IGBT symbol, too.

Hey, this is suitably goofy:

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John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom timing and laser controllers Photonics and fiberoptic TTL data links VME analog, thermocouple, LVDT, synchro, tachometer Multichannel arbitrary waveform generators

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Jim Thompson 13 years ago

also

We await your list of "lethal hazards". Why are you so afraid of actually making a true engineering claim? You're a fraud. ...Jim Thompson

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Fred Bartoli 13 years ago

Le Tue, 04 Jun 2013 12:29:36 -0400, Phil Hobbs a écrit:

There's that one and some others if you can stand the huge SO8 package and insanely low 10.6V BVDS abs max :

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Maybe you can photocopy the datasheet and loose the annoying dots...

Available at Mouser, not Joergly priced, but still affordable.

Thanks, Fred.

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Jim Thompson 13 years ago

[snip]

It may be possible on a single substrate, i.e. single body diode. I'm pondering, and will let the group know. ...Jim Thompson

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Spehro Pefhany 13 years ago

It would be a useful product with many applications.

Failing that, I think there are two dies in the digital transistors which come in SOT-23 and smaller packages.

However, making it on a single chip would allow a chip scale type of construction which would help in getting the heat out in a fault condition. IIRC, the SOT-23 packages are marginal power-wise for high fault voltages, and there are two of them, so they share with an AC fault.

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Phil Hobbs 13 years ago

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past.

situations.

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I like the old fashioned symbols too, because they remind me which way the body diode goes.

Cheers

Phil Hobbs

Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 USA +1 845 480 2058 hobbs at electrooptical dot net http://electrooptical.net

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Phil Hobbs 13 years ago

past.

situations.

Series opposing, right. In normal operation, neither of the body diodes turns on, so they just look like resistors. Once you get up near I_DSS, one body diode does start to conduct, but the other FET provides the current limit.

Cheers

Phil Hobbs

Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 USA +1 845 480 2058 hobbs at electrooptical dot net http://electrooptical.net

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Jim Thompson 13 years ago

I'm done similar body-to-body structures, but in enhanced mode, to implement directional power switching. As in these previously posted links...

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I'll try it out with depletion mode and see what I get.

What catches my attention is the possibility to use such a gimmick as an HV DISCONNECT mechanism... rather than absorptive... ride it out.

I've done similar schemes in bipolar back in my alternator days... turn off the field device during a transient, and ride it out in BVcex mode. ...Jim Thompson

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Jim Thompson 13 years ago

Body-to-body works nicely, though some non-linearity in the "resistance" versus voltage, then you reach IDSS in either direction.

So a monolithic structure IS possible. You just need to convince someone to build it ;-)

What interests me is the series disconnect connection in conjunction with the usual ESD diodes... perfect performance between rails, then limited current into the ESD structure. I have several monolithic processes available to me now that have depletion devices, so I get to play >:-} ...Jim Thompson

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John Larkin 13 years ago

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John Larkin Highland Technology, Inc jlarkin at highlandtechnology dot com http://www.highlandtechnology.com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom laser drivers and controllers Photonics and fiberoptic TTL data links VME thermocouple, LVDT, synchro acquisition and simulation

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Jamie 13 years ago

zener modulating Vgs of the FET. I'm not going to speculate about a bunch of what-if's as to what kind of environment the circuit has to tolerate, just too open ended. The original post said something about just 10mA load or so and a

48V supply, so that means he can easily power limit his source to something workable and eliminate all this crazy conjecture about spikes, blown junctions, unlimited rise times, and megalithic energy storage reservoirs all over the place ready to unleash destruction.

Smoke is fine, it lets you know there is fire in the wire..

But really, how about a soft start on that cap? As you said, current limit is unknown, that could upset the customers supply if it is also operating other items?

Just thinking out load.

Jamie

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Jamie 13 years ago

I use Dep-fets on inputs of devices that only supply a resistor if you want to use the device in current mode. It's easy for some current transmitter to short or a stupid pulled.

I think JL was the one that through me the bone on that one some time back when I was looking for a cheap in line current limiter.

Jfets were also an option but not too many in the low R range.

Jamie

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John Fields 13 years ago

Facts often matter very little to you when you're confronted with the proposition that you've made an error, and you'll go to any lengths in order to make that proposition seem wrong. Kind of like if you were in a race where you were running neck-and-neck for a while with your competition, and then when you started to slow down and he started pulling ahead, you tripped him and won the race.

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John Larkin 13 years ago

What a jerk you are.

John Larkin Highland Technology, Inc jlarkin at highlandtechnology dot com http://www.highlandtechnology.com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom laser drivers and controllers Photonics and fiberoptic TTL data links VME thermocouple, LVDT, synchro acquisition and simulation

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George Herold 13 years ago

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he past.

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Thanks, So it takes -1V (or so) to turn it off. (looking at the data sheet with 'new' eyes.) I guess the best thing is to just order a few.

For input protection I've only done the series (~1k) resistor and diodes to the power rails... which also has 'issues'.

George H.

t -

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josephkk 13 years ago

but also

I just browsed through the app note. $^&#($%($&^#^&)#^^& OMFH Every one of those circuits is a bad design. They look like a summer intern with no experience grade foolishness. Take figure 11, i don't see how to turn the FET off enough for it to work. It would require 4 volts across R2 at zero load current. A normal (enhancement) fet would work just fine.

?-)

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Jim Thompson 13 years ago

Yep. Just make sure that U2-A,B have ESD diodes. ...Jim Thompson

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bloggs.fredbloggs.fred 13 years ago

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That particular circuit originated with Advanced Linear Devices which produ ces depletion MOSFETs with very low thresholds like -0.2V and have fairly l ow currents at VGS=0, uA level. The choice of a depletion FET in a low vo ltage application buys you headroom you would lose using an enhancement FET .

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John Larkin 13 years ago

also

Yeah, that Ixys appnote is horrible.

John Larkin Highland Technology, Inc jlarkin at highlandtechnology dot com http://www.highlandtechnology.com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom laser drivers and controllers Photonics and fiberoptic TTL data links VME thermocouple, LVDT, synchro acquisition and simulation

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bloggs.fredbloggs.fred 13 years ago

Not nearly as horrible as your "regulator" suggestion...

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low power, HV-in regulator with depletion mosfet

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