LED driver

It's yet another latch state. If it ever gets there for any reason, like a noise spike, it's dead. Another component-rich async hairball.

All talk and no show... what we've all come to expect from you.

Please go away. ...Jim Thompson

How can you not see it, especially when it's the same hangup as your last circuit? Well, maybe this one is a little worse.

Q1-Q3 is latched. Either there's not enough current available through R2 to turn Q2 on (and there never is, at 22Mohms) or Q5 is diverting all but 20 uA of it. I can't see the zener voltages, but they don't matter.

(The Q5 topology is an interesting variation on a constant-current source. Call it a shunt CCS maybe.)

Fix it. Add more parts maybe. Or killfile me yet again.

Your ignorance is astonishing... though no big surprise... everyone here has known it for some time >:-}

Prove it... you're all mouth and no brains. ...Jim Thompson

I explained the state. Tell us how the circuit gets out of it.

Same mistake as last time. Only more parts.

You "explained" nothing.

Prove it, instead of waffling.

You can't, you won't, you'll BS. What a loser ;-) ...Jim Thompson

Last latchup you designed, it took other people to convince you it was real. This is the same problem: trigger stage statically latched with insufficient current to turn on the next stage to unlatch things.

If you refuse to see this simple latch state, there's nothing I can do to make you understand it. Maybe some Young Buck will explain it to you.

My apologies! I am _so_ sorry that understanding this latch is beyond your level of expertise. There is a subtlety there that you are missing.

Maybe some Young Buck will explain it to you >:-}

I did point out, several levels of your snarkiness back in this thread, that I had pre-tested this for "magical" latching... and it can always get itself out.

I came up with this scheme while puzzling over how a SIAC/DIAC works.

Now that I understand it, I'll generalize it into a SIAC/DIAC Spice model. Watch the Device Models & Subcircuits page of my website.

Your snarkiness is not sufficient cover for your lack of understanding. ...Jim Thompson

On Sun, 27 Jul 2014 09:15:39 -0700, Jim Thompson Gave us:

And that, folks, IS the nice way of putting it.

Larkin is lucky, as he deserves worse.

Assume Q1-Q3 are latched, and 10 uA coming in from R2. The LED is off so all the current goes through DZ1 and down from there. There's not enough current to turn on Q5 or Q2. The emitter of Q1 is +0.6. There's no current in DZ2 or in C1. This situation is statically stable. It's a hang state.

Say something about this. Why would it unlatch?

The circuit has a nasty hang state. I wouldn't put something like this in my equipment.

Only in your fantasy world. You're missing a critical part.

End of discussion, you have no clue. ...Jim Thompson

So enlighten us and win the debate.

Say something substantive. Why would it unlatch?

It won't.

Come on Jim. You said he's missing a critical part then try to cut off the discussion. What's the critical part?

In article , snipped-for-privacy@highNOTlandTHIStechnologyPART.com says...

Here's my version :) Version 4 SHEET 1 880 680 WIRE 192 -48 160 -48 WIRE 304 -48 256 -48 WIRE -80 -16 -352 -16 WIRE 80 -16 -80 -16 WIRE 160 -16 160 -48 WIRE 160 -16 80 -16 WIRE 304 -16 304 -48 WIRE 368 -16 304 -16 WIRE 160 16 160 -16 WIRE 192 16 160 16 WIRE 304 16 304 -16 WIRE 304 16 256 16 WIRE 368 16 368 -16 WIRE -432 128 -496 128 WIRE -352 128 -352 -16 WIRE 80 128 80 -16 WIRE 368 128 368 96 WIRE -496 144 -496 128 WIRE -80 144 -80 -16 WIRE 240 176 144 176 WIRE 80 224 0 224 WIRE 240 224 240 176 WIRE 240 224 144 224 WIRE 368 240 368 208 WIRE -496 256 -496 224 WIRE 0 272 0 224 WIRE 0 272 -80 272 WIRE 80 272 0 272 WIRE -80 288 -80 272 WIRE 0 288 0 272 WIRE 368 336 368 304 WIRE -80 384 -80 352 WIRE 0 384 0 368 WIRE 144 384 144 320 FLAG -496 256 0 FLAG 0 384 0 FLAG 144 384 0 FLAG 368 336 0 FLAG -80 384 0 SYMBOL pnp 144 224 R180 WINDOW 0 0 158 Left 2 WINDOW 3 -43 135 Left 2 SYMATTR InstName Q1 SYMATTR Value 2N3906 SYMBOL npn 80 224 R0 SYMATTR InstName Q2 SYMATTR Value 2N3904 SYMBOL voltage -496 128 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 WINDOW 3 -7 178 Left 2 SYMATTR InstName V1 SYMATTR Value 35 SYMBOL res -336 112 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R1 SYMATTR Value 10MEG SYMBOL res -16 272 R0 WINDOW 0 60 50 Left 2 SYMATTR InstName R2 SYMATTR Value 200k SYMBOL zener -64 208 R180 WINDOW 0 24 64 Left 2 WINDOW 3 51 28 Left 2 SYMATTR InstName D1 SYMATTR Value BZX84C15L SYMATTR Description Diode SYMATTR Type diode SYMBOL cap 352 240 R0 SYMATTR InstName C1 SYMATTR Value 100n SYMBOL ind 352 112 R0 SYMATTR InstName L1 SYMATTR Value 100mh SYMBOL cap -96 288 R0 SYMATTR InstName C2 SYMATTR Value 1n SYMBOL diode -96 208 R0 WINDOW 0 35 34 Left 2 WINDOW 3 -89 31 Left 2 SYMATTR InstName D3 SYMATTR Value 1N914 SYMBOL LED 256 0 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName D2 SYMATTR Value AOT-2015 SYMATTR Description Diode SYMATTR Type diode SYMBOL diode 192 -32 R270 WINDOW 0 32 32 VTop 2 WINDOW 3 0 32 VBottom 2 SYMATTR InstName D4 SYMATTR Value 1N914 SYMBOL res 352 0 R0 SYMATTR InstName R3 SYMATTR Value 330 TEXT -240 -64 Left 2 !.tran 10 startup

Jamie

They say, "Silence is golden". It sure is... a full afternoon of silence. I think Larkin finally realized his gross blunder, "... statically latched with insufficient current to turn on the next stage to unlatch things." "Statically" is one of the key words.

Any young buck want to address that blunder? Of course it comes with the risk of perpetual denigration by Larkin >:-}

Very green baloney ;-) ...Jim Thompson

On Sun, 27 Jul 2014 12:50:53 -0700, John Larkin wrote: . . .

--- Y'know, John, for someone who claims to be not at all competitive you're very fond of using that line, but when push comes to shove and the enlightenment you asked for is staring you right in the face you either refuse to acknowledge it by not responding to it, or by moving the goal posts and pretending you were talking about something else.

John Fields

If you know why it would get out of the hang state, post it.