Yes, Johnny. The company I work for.
You sure had a small brain budget.
Maybe God will dole you out a bit more in your next life, if you get one.
Yes, Johnny. The company I work for.
You sure had a small brain budget.
Maybe God will dole you out a bit more in your next life, if you get one.
But not you. No surprise.
John
No need for 10GbE in the janitorial closet.
Still having word meaning issues, I see.
Odd too, since "we" is one of the first words a young child learns.
No surprise that you are too goddamned retarded to remember those meanings.
Wow, they allow you to plug in the cables? That's brave of them.
John
In Nethack, you'd be the guy walking around the dungeon blind, not because you drank a potion, but because you put a towel on your head, and are too stupid to remove it.
y.
ater.
port memory,
hole
rI thought Intel killed their USB 3.0 product a few months back.
Or the idiot janitor, for that matter.
-- For the last time: I am not a mad scientist, I'm just a very ticked off scientist!!!
Fortunately, I'm in San Francisco, and I design electronics.
John
Not being a chip designer I wouldn't really know, but it sure seems to me that even on-chip it'd be a lot easier routing some high-speed serial traces around than large parallel busses.
I did design do an FPGA design back around the turn of the century where I used a 128-bit bus internally in one of the Xilinx Virtex parts. Worked pretty well -- it was connected to two parallel banks of SDRAM, all running at
100MHz -- 1.6GBps was pretty hot stuff back in 2000.---Joel
On-chip you don't have the same issues as off-chip, e.g. I/Os are cheaper. ;-) Large parallel busses are the way of life. High-speed serial busses imply an even faster clock, something that's not a positive.
One of the FPGAs I designed slightly before that (Spartan-XL) has routing problems. I did have to go to serial communications on the damned thing because it wouldn't route reliably otherwise. I used sorta a SPI sort of thing and bit-banged it with an external 8051. Speed wasn't an issue because all the FPGA was doing was setting up power supplies and clock generators. The other FPGA on the board was a Virtex (or Vertex/E, depending on the BOM); no problems with routing wide busses there (I cheated and used SSRAM ;).
That was my first thought as well. Intel is noterious for dropping or selling product lines that don't do well or suddenly don't fit into their core business.
Same here. We looked at the atom for an embedded board but got quotes far exceeding the price of complete motherboards!
-- Failure does not prove something is impossible, failure simply indicates you are not using the right tools... nico@nctdevpuntnl (punt=.) --------------------------------------------------------------
memory,
USB 3.0 just came out.
And place faith in anything you spew? Never.
Probably why we have neither at our firm.
Do you guys know just how utterly childish you look to everyone?
And I am in San Diego, and I design electronics.
Now f*ck off and die, John Larkin, and if you chime any more of your pathetic, peanut gallery pussy boy horseshit, I will slap it back in your face again, you pathetic little wussified bastard.
Reflections. The word for today is "ringing", but I don't expect you to have a grasp of that term either.
that
around
at
AlwaysWrong is *always* wrong. You don't get "reflections" or "ringing" in PAR, not that anyone expects you to have a grasp of anything except your wee willie (and wee it must be).
G > I thought Intel killed their USB 3.0 product a few months back.
Archie > USB 3.0 just came out. Archie > And place faith in anything you spew? =A0Never.
Is Intel delaying USB 3.0 to give Light Peak an advantage? | ZDNet Jun 3, 2010 ... Interesting news from chip giant Intel - the company is delaying its USB 3.0 motherboard chipset until 2012
Is Intel delaying USB 3.0 to give Light Peak an advantage? By Adrian Kingsley-Hughes | June 3, 2010, 8:10am PDT
Summary Interesting news from chip giant Intel - the company is delaying its USB 3.0 motherboard chipset until 2012 =85 the company wouldn=92t be trying to make a gap in the market for its Light Peak standard, would it?
Gigabyte confirmed Intel=92s USB 3.0 chipset will be delayed until 2012. There=92s no reason given.
The USB 3.0 spec was introduced in November of last year and is designed to serve as a replacement for the aging USB 2.0 standard (which was released in April of 2000). It offers a significant performance boost (up to 4.8Gbit/s) for those wanting to transfer a lot of data to external storage devices.
Now, this delay is interesting for a number of reasons. First, there are plenty of vendors already shipping USB 3.0 motherboards. Asus, Gigabyte and ASRock already have USB 3.0 compatible boards for sale. Given that these vendors can integrate USB 3.0 into their products, it=92s hard to imagine that the world=92s largest chip maker would have any problems getting this standard worked out.
Another reason why this delay is interesting is that Intel has its own connection standard that it=92s trying to push - Light Peak. Intel wouldn=92t be trying to make a gap in the market for this standard, would it?
Light Peak does have advantages over USB 3.0. It=92s more than twice as fast, offering a transfer rate of 10 Gbit/s. Secondly the optical cabling can carry the signal 100 meters. And thirdly, and I think most significantly, a single cable can carry multiple protocols simultaneously (so effectively you could push USB, SATA, HDMI, DVI, and PCI-E all down the same pipe).
I can=92t think of a single valid technical reason why Intel would delay integrating USB 3.0 =85 other than to try to give Light Peak an advantage. .
Archie you charmer.
The keyboard intrerface (if present) is on the ISA side of the south bridge :)
-- ?? 100% natural
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