Intel announces Atom CPu with Altera FPGA in one housing

An MCM. What a waste.

Actel has hard/integrated ARM Cortex-M3 cores (with mixed signal thrown in) and Xilinx has integrated PPC cores. Altera is rather late to this party.

On a sunny day (Mon, 22 Nov 2010 14:31:41 -0600) it happened " snipped-for-privacy@att.bizzzzzzzzzzzz" wrote in :

One word: x86 Do not underestimate the market. I sure would like a mobo with one. Fun to play with.

Interesting, the FPGA is connected via 2 PCIe buss's. Sounds more like a IO integration for hardware manufacturers.

Cheers

x86 and FPGA don't go together.

You're probably the only one. Hardly a market.

Yikes, what a nightmare. An ARM with a memory-mapped FPGA would be a lot nicer. Better yet, put them on the same chip.

John

Not sure what you mean by a "memory-mapped FPGA", but...

Different subject, but this one looks interesting, too:

...

It could run windows potentially, which I'm sure would be a plus for some people.

Both then again if it is only connected via two PCIe busses, so 2+2+2 differential pairs why bother putting them on the same package?

and isn't PCIe basically memory mapped, just with some smarts in between to make it configurable and not having to connect (and get the timing right on) a lot of connections

-Lasse

PCIe is packet based, serial, with all sorts of enumeration, protocols, CRCs, device drivers, and lots of latency. It's another layer of horror piled on top of PCI. Intel does stuff like that.

John

And it is simply ridiculous to connect parts of the same chip with such a complicated monstruosity. Why would one go through all those hoops if it is possible to just map it in the CPU address space? Why waste a substantial part of the chip's resources to just connect two parts of the same chip instead of just using "wires"?

Another quick question -- are they going to give that PCIe IP for free or one would have to shell out some kilobucks to use that weirdo?

Probable concept meeting between engineers:

""

Lets do something reconfigurable, cheap, mainstream, and low power.

So let's start with an Atom, and tack something onto it.

FPGAs are software reconfigurable, let's go with that.

How do we connect to it? Well, we've got this PCIe bus interface design that we've been using onboard. Let's just tack it on there.

Good idea, that way it'll look like always-installed hardware. No need to rewire all those dirty internal busses, and it's already a published specification.

What about bandwidth?

Well, it's something gigabits, and how much data are you going to put through an FPGA, anyway? If you put an Atom inside it, you'd be lucky running it faster than a 486...

Good enough for me. Let's do it.

We've already got all the designs, tested and working or on license, so let's go write the mask and send it to production.

""

So yeah, kind of lazy, could be better, but also expandable in the usual way one expands a computer (by adding a card), so hey, it's something. It's something that's never been done in consumer products before, that I know of. (I recall some minicomputers / mainframes had reconfigurable ALUs, but that was a long time ago.)

Man, what a nightmare this could make for drivers... Instead of expansion cards that have all the logic already working, and you download only a marginally sized driver, you get the logic file in the driver, plus the software driver to run it! The FPGA could be sectioned, maybe the installer or OS has a marginal router/compiler to allow multiple designs on the same chip. So you could have a few commercial "drivers" inside, but you have to be careful not to overwrite any existing drivers, or you'll lose them, and you have to be certain of what you remove to free up that space, or your graphics generator might fall off, or something.

Just imagine if this were taken to the logical conclusion: the whole northbridge, say, turned into an FPGA. Obviously you need the BIOS to hold some rudimentary system so the computer can boot up at all, but once the software gets a hold of it, what's to stop them from reprogramming the keyboard interface, among other things?

There are some unsecure, amazing and bizarre opportunities this could open up if it becomes a trend!

Tim

It actually removes the nightmares.

PCI. Did you all just forget what it stands for?

Intel made it as well, and it is pretty thoroughly entrenched. I am surprised at the dork that thinks it is some kind of un-needed glue, when it suits the purpose just fine.

Anyone seeing what an Atom backed computer can do, would know what this is capable of.

I have a box that does Blu Ray data rate streams IN, and then processes the data, and then pumps it back out thru an HDMI connection.

Considering the data rates involved, and the processing required, I'd say that it has done a pretty good job.

An Atom is a stripped down Xeon, so why don't they do this pairing with a xeon? Likely because that would be overkill.

This pairing sounds like it has possibilities.

The idea is to use this to make your device with as little "glue parts" as possible.

AND it allows one to choose ANY OS that one wishes, so it is good for embedded designs as it is for a refrigerator.

Why unsecure?

Aye but the Arria has a hard IP core to handle _most_ of the complexity.

Is this not the natural progression to improve data rates between devices in the system? (The limitations of the PCI bus was what prompted the development of PCIe).

Nial.

I wonder if the entire PCIe hardware stack is free. You'd certainly need a PCIe driver on the Atom end, which suggests and OS or RTOS, but an Atom pretty much needs that anyhow. You're stuck with the latency.

I suppose, but serialization, especially at this complexity, seems silly when all the stuff could be on one chip. You can't get much faster, or lower driver overhead, than shared dual-port memory, which is how we like to interface an FPGA to a uP.

John

On the FPGA the Altera tools build around the PCIe core with no licence required.

You've got a bit more latency but the throughput is potentially much greater. I think the Arrias can do 4 lane PCIe so that's a reasonable bandwidth.

Could they have put the configurable stuff on chip and allowed it to be easily targeted ?

memory,

What's your maximum bandwidth?

I know the PCI consortium migrated to very fast serial interfaces as the complexity of routing wide fast parallel busses increased dramatically.

If both devices have a PCIe hard core then a simple serial interface is a pretty quick way of combining the functionality in one package.

Nial.

Don't know about Altera but I believe Xilinx has an PCIe core in their free webpack for the devices that has PCIe HW

at 500MB/lane, a memory mapped interface would have to run very fast or use a huge number of pins.

And I doubt ripping open the design for an Atom and an FPGA and combining the two on one chip would be a cheap or simple task.

-Lasse

And when are they going to drop the ball on that one, like on so many other things?

Makes perfect sense. Keeping two designs completely independent, don't have to deal with the integration issues.

VLV