Input protection for 3.3V FPGA in a TTL world... (2023 Update)

I am still working with a friend on a TTL level replacement for some chips on a pinball board and we have a nice FPGA (MAX 10 based) but it wants (of course) 3.3V I/O.

I was thinking that SN74CBT16211C (24 x IO level shifter) and a TVS arrays like the D3V3X8U9LP3810-7 with a low Ohm (1 - 10R) Flame-Proof

1/8W or less resistor on the outside world interface would do for protection.

Any other suggestions to reduce real estate, but give us both TTL/3.3 interfacing as well as protecting the SN74CBT16211C where it interfaces to switches, etc. in the 'real world' of a pinball game cabinet.

Thanks!

John :-#)#

PS, my apologies for being On-Topic!

Reply to
John Robertson
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For an input to the FPGA, you could use just a series resistor and let any overvoltage or spikes hit the ESD diodes. Debounce as needed.

10K or something. Paranoids could add a cap to ground, 1 nf or so.

Topic? We have a topic?

Reply to
John Larkin

The MAX 10 datasheet has very specific input overvoltage specs, for instance 4.27V for <4.3% of the time over 11.4 years, equally bizarrely they specifiy the supply voltage to three decimal places.

I think Intel really do not want the ESD diodes to be touched?

piglet

Reply to
piglet

What are they for?

Reply to
John Larkin

There's this that does what you want, maybe too much.

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If you click on the schematic link, you get some MOSFET level shifters:
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Since you're too busy to tell anyone whether you're talking about 8 I/O or 500 I/O, tough shit if this doesn't work for you.

Reply to
Fred Bloggs

Ah, I didn't think to give an IO count. It is around 50 in total, with

20 or so actually going to the outside world.

Thanks!

John :-#)#

Reply to
John Robertson

Not an entirely safe approach. When you let ESD diode dump current into the substrate it can come out in odd places, and the FPGA could start behaving strangely. I've never tried it with an FPGA but I did get my fingers burnt with a less complex integrated circuit.

Reply to
Anthony William Sloman

Depending on how many 'switches' there are, the venerable MC1489 tolerates lots of input volts and is a multiple-sourced jellybean. I"m wary of diode-to-Vdd clamps, though, since that just puts trash currents into your 3.3V regulator; the chip can survive, but will regulation suffer? No need for a series resistor, that's built-in, and '1489 input clamping is to GND.

Reply to
whit3rd

Actually the diode clamps are tied to the 5VDC Vcc, and there will be a

5.6V Transorb as well to take care of surges before the regulator is affected.

My I/O are switches on the playfield and coin acceptor and self test switch, all are the most at risk of static shock from the player. Considering that there are around 20 I/O to protect I don't think a group of 1489s is going to fit as well as some TVS arrays and resistors that will blow open if any real current starts to flow.

It does raise the problem of ground or power loops though if there is a surge on one of the lines. I'll talk that over with my cohort - we have options for ground and 5VDC tie points.

Thanks,

John :-#)#

Reply to
John Robertson

On a sunny day (Thu, 14 Oct 2021 23:05:16 -0700) it happened John Robertson snipped-for-privacy@flippers.com wrote in <VPKdnVOaSuaCh snipped-for-privacy@giganews.com:

I had such a user interface problem long ago and used opto couplers.

Reply to
Jan Panteltje

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