Interfacing FPGA with TTL


I am using the UP2 development board from Altera. I have programmed a simple ALU in it. I have done some hardware tests on it through its expansion slots but the results are inconsistent. To perform the tests, I connect the expansion slots with IDE cables to a verabod in which i have soldered many switches and LEDs. However the results were inconsistent, sometimes I couldn't load the the values into the bus at load at all. Other times when i load the upper bits, the lower bits get erased. Any inputs on this? I was also thinking of interfacing it with a control card made entirely of TTL chips. Power source is taken from the TTL control card. Any inputs on the potential problems I might face? Thanks!


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I'm not familiar with Altera parts or your UP2, so this is all I could think of...Make sure that all of the inputs to the Altera PLD chips are connected to a HI or LO voltage. Floating inputs can cause a CMOS chip to do wierd things. If the TTL board is sending a clock to the UP2, keep the IDE cable as short as you can. Also, on the TTL board, make sure that you have plenty of bypass caps (a 0.1uF cap per chip is OK). HTH

-Dave Pollum

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Dave Pollum

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